JVC GZ-MC200US Schematic Diagrams page 19

IC1004
SN74LV32ADGV-X
R1028 1K
0.01
C1008
V_BATT
T_BATT
I_MTR
KEY_C P_DET
CF_SLOT
VPP
AVDD
VDD
IC1001
OSC2
OSC1 MN101C77CJA
VSS
XI
XO
MMOD
RESET AUDIO_DATA
REG_DATA
RTC_DATAIN
ONS".
D E
SD_SLOT
L_MUTE
LCD_RVS_SW
LCD_OPEN_SW
PLAY_SW
POFF_SW
REC_SW
MODE_SW
PD_L
AUDIO_CS
JIG_CLK
AUDIO_CLK
JIG_DATA
R1059
470K
IC1007
MB90097PFV155-X
SCLK HD
CS VD
DATA VC0
RST VC1
VDD VC2
SDR BLKA
XD VC3
EXD BLKB
TEST TST0
VSS BLKC
R1046 1K
R1030 1K
IC1005
SN74AHC2G53T-X
TL1002
C1038
R1024 1K
ANALOG ( SUB CPU )
0 2
F
OSD_HD
OSD_VD
VC0
VC1
VC2
BLKA TO V I/O
VC3
BLKB
BLKC
DOT_CLK
TO AUDIO
A_MUTE
TO CN207
CHRG_EVR
R1042 1K
TO CN208
P_DET
TO AUDIO
AUEE_CTL
R1043 1K
TO CN208
HP_DET
R1041 1K
TO CN207
CF_SLOT
TL1001
TO AUDIO
L_MUTE
R1038 1K
TO TL203
LCD_RVS
R1036 1K
PLAY_SW
TO CN209
REC_SW
MODE_SW
SJIG_RX
TO CN203
SJIG_TX
AUD_CLK
AUD_DATA
TO AUDIO
PD_L
AUDIO_CS
R1060
47K
TO CN203
MD_THRMO
0.01
R1021 1K
KEY_B
R1022 1K
KEY_A
R1023 1K
ZOOM_SW
R1013 1K
KEY_C TO CN207
I_MTR
T_BATT
V_BATT
TO CN207
DC_CHEK
TO CN203
SCPU_CS
y20337001a_rev0
G
2-18