Drive Assy Adjustment - Pioneer PDP-5050SX Service Manual

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6.2 DRIVE ASSY ADJUSTMENT

How to readjust the timing of the control signals when the DRIVE Assy TND506MD is
A
to be replaced
As there is a large difference in delay time among the individual TND506MDs, timing adjustment has been made on each
TND506MD in the unit process. If the TND506MD is replaced on the X or Y Drive Assy, readjustment of the timing of the
control signals is required.
Assy Replaced IC
X DRIVE
Y DRIVE
B
• How to adjust
Adjust the timing between the startup of the control signals of SUS-U1, SUS-D1, SUS-U2, and SUS-D2 and the startup
of the voltage between the gate and the source of the output FET, with the VR resistors that are inserted in the signal
line in series. When adjusting, set the unit to Drive OFF mode, and Vsus to 0 V. (For details on how to set to Drive OFF
mode, see "7.1.5 Power on/off function for the large-signal system".)
• Specified values for adjustment and adjustment points
Set Value for
Signal Name
Delay Time
375ns ± 10ns
SUS-U1
C
375ns ± 10ns
SUS-D1
375ns ± 10ns
SUS-U2
375ns ± 10ns
SUS-D2
Note: Connect GND of the probe with DGND (DGND: X Drive Assy: K1020, Y Drive Assy: K2010) for input signal.
For outputting a signal, obtain a signal from the FET gate terminal.
For adjustment, magnify any pulse in the waveform.
Waveform of the
control signal
(input signal)
D
VGS waveform
(output signal)
E
• Actually measured waveforms
Input signal: 1V/div
F
94
1
2
Signal for which Readjustment is Required
IC1101 XSUS-U2 & XSUS-D2
IC1102 XSUS-U1 & XSUS-D1
IC2201 YSUS-U1 & YSUS-D1
IC2202 YSUS-U2 & YSUS-D2
X DRIVE
Input Output
Signal Signal
K1005 Q1108
K1009 Q1112
K1008 Q1103
K1006 Q1105
Adjust so that the delay is
in the range of 375 ± 10 ns.
500us/div
Output FET VGS 5V/div
VGS=5V line
PDP-5050SX
2
3
Y DRIVE
Input
Adjustment
Output
VR Signal
Signal
VR1103 K2025 Q2202
VR1104 K2027 Q2205
VR1101 K2022 Q2208
VR1102 K2024 Q2212
About 2.5V
Magnify.
3
4
Adjustment
VR
VR2201
VR2202
VR2203
VR2204
50ns/div
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