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TPS54335AEVM-010 3-A Regulator Evaluation Module
This user's guide contains background information for the TPS54335A as well as support documentation
for the TPS54335AEVM-010 evaluation module (BSR010-001). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54335AEVM-010.
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Trademarks
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SLVUB76 - July 2017
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Copyright © 2017, Texas Instruments Incorporated
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TPS54335AEVM-010 3-A Regulator Evaluation Module
User's Guide
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Table of Contents
Related Manuals for Texas Instruments TPS54335AEVM-010
Summary of Contents for Texas Instruments TPS54335AEVM-010
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Page 1: Table Of Contents
TPS54335AEVM-010 3-A Regulator Evaluation Module This user's guide contains background information for the TPS54335A as well as support documentation for the TPS54335AEVM-010 evaluation module (BSR010-001). Also included are the performance specifications, the schematic, and the bill of materials for the TPS54335AEVM-010. -
Page 2: Introduction
The compensation components are external to the integrated circuit (IC), and an external divider allows for an adjustable output voltage. Additionally, the TPS54335A provides an adjustable undervoltage lockout input. The absolute maximum input voltage is 30 V for the TPS54335AEVM-010. Table 1. Input Voltage and Output Current Summary... -
Page 3: Output Voltages Available
R1 I STOP ENFALLING = 1.15 µA, I = 3.3 µA, V = 1.17 V and V = 1.21 V ENFALLING ENRISING SLVUB76 – July 2017 TPS54335AEVM-010 3-A Regulator Evaluation Module Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 4: Test Setup And Results
Test Setup and Results This section describes how to properly connect, set up, and use the TPS54335AEVM-010 evaluation module. The section also includes test results typical for the evaluation module and covers efficiency, output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up. -
Page 5: Tps54335Aevm-010 Efficiency
= 24 V Output Current - A C001 Figure 1. TPS54335AEVM-010 Efficiency Figure 2 shows the efficiency for the TPS54335AEVM-010 on a semi-log scale to better show light load efficiency. The ambient temperature is 25°C. = 12 V = 24 V 0.001 0.01... -
Page 6: Tps54335Aevm-010 Load Regulation
Test Setup and Results www.ti.com Output Voltage Load Regulation Figure 3 shows the load regulation for the TPS54335AEVM-010. 0.20 0.15 = 24 V 0.10 0.05 = 12 V 0.00 ±0.05 ±0.10 ±0.15 ±0.20 Output Current - A C003 Figure 3. TPS54335AEVM-010 Load Regulation Measurements are given for an ambient temperature of 25°C. -
Page 7: Tps54335Aevm-010 Transient Response
Load Transients Figure 5 shows the TPS54335AEVM-010 response to load transients. The current step is from 25% to 75% of maximum rated load at 24-V input. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output. -
Page 8: Tps54335Aevm-010 Output Ripple, I
Figure Figure 8, and Figure 9 show the TPS54335AEVM-010 output voltage ripple for full load, light load, and skip mode operation. V = 24 V. The output The ripple voltage is measured directly across the output capacitors. = 20 mV / div (ac coupled) SW = 10 V / div Time = 2 µsec / div... -
Page 9: Tps54335Aevm-010 Output Ripple, I
= 0 A Input Voltage Ripple Figure 10 shows the TPS54335AEVM-010 input voltage ripple. The output current is the rated full load of 3 A and V = 24 V. The ripple voltage is measured directly across the input capacitors. -
Page 10: Tps54335Aevm-010 Start-Up Relative To
Powering Up Figure 11 Figure 12 show the start-up waveforms for the TPS54335AEVM-010. In Figure 11, the output voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1and R2 resistor divider network. In... -
Page 11: Tps54335Aevm-010 Shut-Down Relative To
2.10 Powering Down Figure 13 Figure 14 show the start-up waveforms for the TPS54335AEVM-010. In Figure 13, the output voltage ramps down as soon as the input voltage falls below the UVLO stop threshold as set by the R1 and R2 resistor divider network. In... -
Page 12: Board Layout
Board Layout www.ti.com Board Layout This section provides a description of the TPS54335AEVM-010, board layout, and layer illustrations. Layout Figure 15 through Figure 17 show the board layout for the TPS54335AEVM-010. The topside layer of the EVM is laid out in a manner typical of a user application. The top and bottom layers are 2-oz. copper. -
Page 13: Tps54335Aevm-010 Top-Side Layout
Board Layout www.ti.com Figure 16. TPS54335AEVM-010 Top-Side Layout Figure 17. TPS54335AEVM-010 Bottom-Side Layout SLVUB76 – July 2017 TPS54335AEVM-010 3-A Regulator Evaluation Module Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 14: Schematic And Bill Of Materials
Schematic and Bill of Materials www.ti.com Schematic and Bill of Materials This section presents the TPS54335AEVM-010 schematic and bill of materials. Schematic Figure 18 is the schematic for the TPS54335AEVM-010. Spacer VIN 8V - 28V VOUT 5V, 3A MAX 15µH TPS54335ADDAR 0.1µF... -
Page 15: Tps54335Aevm-010 Bill Of Materials
Schematic and Bill of Materials www.ti.com Bill of Materials Table 5 presents the bill of materials for the TPS54335AEVM-010. Table 5. TPS54335AEVM-010 Bill of Materials Designator Quantity Value Description PackageReference PartNumber Manufacturer 10uF CAP, CERM, 10uF, 35V, +/-10%, X7R, 1210... - Page 16 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 17 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 18 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
- Page 19 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated...
- Page 20 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...