Texas Instruments TAS5066PAG User Manual
Texas Instruments TAS5066PAG User Manual

Texas Instruments TAS5066PAG User Manual

For the tas5066pag 6-channel digital audio pwm processor and tas5111dad digital amplifier power output stage

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TAS5066-5111D6EVM
PurePath DigitalE EVM
for the TAS5066PAG Six-Channel Digital Audio
PWM processor and TAS5111DAD Digital
Amplifier Power Output Stage
User's Guide
March 2004
Digital Audio and Video Products
SLEU052

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Summary of Contents for Texas Instruments TAS5066PAG

  • Page 1 TAS5066-5111D6EVM PurePath DigitalE EVM for the TAS5066PAG Six-Channel Digital Audio PWM processor and TAS5111DAD Digital Amplifier Power Output Stage User’s Guide March 2004 Digital Audio and Video Products SLEU052...
  • Page 2 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...
  • Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
  • Page 4 These types of devices can be identified using the EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Copyright  2004, Texas Instruments Incorporated Mailing Address: Texas Instruments...
  • Page 5: Read This First

    About This Manual This manual describes the operation of the TAS5066-5111D6EVM evaluation module from Texas Instruments. How to Use This Manual This document contains the following chapters: Chapter 1 — Overview Chapter 2 — System Interfaces Chapter 3 — Protection Information about Cautions and Warnings This document may contain cautions and warnings.
  • Page 6 Trademarks Related Documentation from Texas Instruments The following table contains a list of data manuals that have detailed descrip- tions TAS5066−5111D6EVM. The data manuals can be obtained at the URL http://www.ti.com. Part Number TAS5066PAG TAS5111DAD SN74LVC1G08 SN74LVC1G126 TPS3801K33 Additional Documentation TAS5066−5111D6EVM Application Report −...
  • Page 7: Table Of Contents

    Overview ............... . TAS5066-5111D6EVM Features PCB Key Map .
  • Page 8 Contents Figures 1−1 Complete PurePath Digital System 1−2 Physical Structure for the TAS5066-5111D6EVM 2−1 Recommended Power-Up Sequence 2−2 J901 and J903 Pin Numbers (PCB Connector Top View) 2−3 J902 Pin Numbers (PCB Connector Top View) 2−4 J100 − J600 Pin Numbers (PCB Connector Top View) Tables 2−1 Recommended Power Supplies...
  • Page 9: Overview

    The TAS5066−5111D6EVM PurePath Digitalt customer evaluation module demonstrates two integrated circuits TAS5066 and TAS5111DAD from Texas Instruments (TI). The TAS5066 is a high-performance 24-bit six-channel digital pulse width modulator (PWM) based on Equibit variety of serial input (I@S) options including right justified, left justified, and DSP data formats.
  • Page 10: Tas5066-5111D6Evm Features

    TAS5066-5111D6EVM Features 1.1 TAS5066-5111D6EVM Features 6-channel PurePath Digitalt evaluation module Self-contained protection system (short circuit and thermal) Standard I Double-sided plated-through PCB layout Figure 1−1. Complete PurePath DigitalE System 6 channel Control interface analog input PC interface Optical and coaxial S/PDIF input Example TI input–PC board...
  • Page 11: Pcb Key Map

    1.2 PCB Key Map The physical structure for the TAS5066−5111D6EVM is illustrated in the fol- lowing figure. Figure 1−2. Physical Structure for the TAS5066-5111D6EVM J902 PSU CONTROL J100 J200 CONTROL INTERFACE J903 H-Bridge J300 J400 TAS5066 PCB Key Map J500 J600 AUDIO INTERFACE Overview...
  • Page 13: System Interfaces

    This chapter describes the TAS5066−5111D6EVM board in regards to power supply (PSU) and system interfaces. Topic PSU Interface (J901) ......... . . PSU Control Interface (J902) .
  • Page 14: Psu Interface (J901)

    PSU Interface (J901) 2.1 PSU Interface (J901) The TAS5066−5111D6EVM module must be powered from one or two exter- nal regulated power supplies. High audio performance requires a stabilized output stage power supply with low ripple voltage and low output impedance. Note: The length of power supply cable must be minimized.
  • Page 15: J901 And J903 Pin Numbers (Pcb Connector Top View)

    Figure 2−2. J901 and J903 Pin Numbers (PCB Connector Top View) Table 2−2. J901 Pin Description Pin Number Table 2−3. J903 Pin Description Pin Number Note: Optional, use to decrease impedance to achieve better performance. Net-Name at Schematics V-HBRIDGE Output stage power supply −...
  • Page 16: Psu Control Interface (J902)

    PSU Control Interface (J902) 2.2 PSU Control Interface (J902) This interface is used for on-board sensing of output supply voltage and for power supply volume control (PSCV) signal. Figure 2−3. J902 Pin Numbers (PCB Connector Top View) Table 2−4. J902 Pin Description Pin Number Net-Name at Schematics NOT USED...
  • Page 17: Loudspeaker Connectors (J100 − J600)

    2.3 Loudspeaker Connectors (J100 − J600) Both positive and negative speaker outputs are floating and may not be connected to ground (e.g., through an oscilloscope). Figure 2−4. J100 − J600 Pin Numbers (PCB Connector Top View) Table 2−5. J100− J600 Pin Description Pin Number Loudspeaker Connectors (J100 −...
  • Page 18: Control Interface (J50)

    Control Interface (J50) 2.4 Control Interface (J50) This interface connects the TAS5066-5111D6EVM board to a TI input board. Table 2−6. J50 Pin Description Pin Number Net-Name at Schematics PSVC RESET ERR-RCVY MUTE 8, 9 RESERVED 13, 14 RESERVED DBSPD CLIP_MODULATOR 18, 19 RESERVED SHUTDOWN1...
  • Page 19: Digital Audio Interface (J51)

    2.5 Digital Audio Interface (J51) The digital audio interface contains digital audio signal data (I2S), clocks etc. Please see the TAS5066 data manual for signal timing and details not ex- plained in this document. Table 2−7. J51 Pin Description Pin Number Net-Name at Schematics MCLK SDIN1...
  • Page 20: Pwm Timing, Interchannel Delay Registers

    PWM Timing, Interchannel Delay Registers 2.6 PWM Timing, Interchannel Delay Registers For maximum performance, the PWM timing must be optimized for the specific configuration and PCB layout. The default values in TAS5066 is properly not optimal in many designs and therefore the interchannel delays must be pro- grammed by I2C to the TAS5066 at startup and after every system reset.
  • Page 21: Protection

    This chapter describes the short circuit protection and fault reporting circuitry of the TAS5111 device. Topic Short Circuit Protection and Fault Reporting Circuitry Device Fault Reporting ........Chapter 3 Protection Page...
  • Page 22: Short Circuit Protection And Fault Reporting Circuitry

    Short Circuit Protection and Fault Reporting Circuitry 3.1 Short Circuit Protection and Fault Reporting Circuitry TAS5111 is a self-protecting device that provides device fault reporting (includ- ing high-temperature protection and short circuit protection). TAS5111 is con- figured in back-end auto-recovery mode and therefore resets automatically af- ter all errors (M1, M2 and M3 is set low).

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