Table of Contents

Advertisement

1

10.16 MAIN ASSY (1/3)

A
R 1 0 2 0
2 2
SEG_R4_01
SEG_R4
2 9
R 1 0 2 1
2 2
SEG_R5_01
SEG_R5
2 8
R 1 0 1 9
2 2
SEG_R3_01
SEG_R3
2 7
R 1 0 2 2
2 2
SEG_R6_01
SEG_R6
2 6
R 1 0 1 8
2 2
SEG_R2_01
SEG_R2
2 5
R 1 0 2 3
2 2
SEG_R7_01
SEG_R7
2 4
R 1 0 1 7
2 2
SEG_R1_01
SEG_R1
2 3
R 1 0 2 4
2 2
SEG_R8_01
SEG_R8
2 2
R 1 0 1 6
2 2
SEG_R0_01
SEG_R0
2 1
R 1 0 2 5
2 2
SEG_R9_01
SEG_R9
2 0
R 1 0 2 6
2 2
SEG_R10_01
SEG_R10
1 9
R 1 0 0 9
2 2
SEG_R13_01
SEG_R13
1 8
R 1 0 2 9
2 2
SEG_R16_01
SEG_R16
1 7
B
R 1 0 1 0
2 2
SEG_R14_01
SEG_R14
1 6
R 1 0 1 5
2 2
GRID_C6_01
GRID_C6
1 5
R 1 0 1 1
2 2
SEG_R20_01
SEG_R20
1 4
R 1 0 3 0
2 2
SEG_R17_01
SEG_R17
1 3
R 1 0 1 2
2 2
SEG_R21_01
SEG_R21
1 2
R 1 0 3 2
2 2
SEG_R19_01
SEG_R19
1 1
R 1 0 0 3
2 2
GRID_C0_01
GRID_C0
1 0
NC
9
R 1 0 0 4
2 2
GRID_C1_01
GRID_C1
8
R 1 0 2 7
2 2
SEG_R11_01
SEG_R11
7
R 1 0 0 5
2 2
GRID_C2_01
GRID_C2
6
R 1 0 3 1
2 2
SEG_R18
SEG_R18_01
5
R 1 0 0 6
2 2
GRID_C3_01
GRID_C3
4
R 1 0 2 8
2 2
SEG_R15_01
SEG_R15
3
R 1 0 0 7
2 2
GRID_C4_01
GRID_C4
2
R 1 0 0 8
2 2
GRID_C5
GRID_C5_01
1
V K N 1 5 8 5 - A
C N 1 0 2 0
C
H
3/3
C N 1 0 2 1
V K N 1 5 8 5 - A
V+5D_LED
GNDD_LED
1
GNDD_LED
2
GNDD_LED
V+5D_LED
3
V+5D_LED
4
3:12C
MUTE2
M U T E 2
5
5L
STBY_LED
S T B Y _ L E D
6
3:12C
MUTE3
M U T E 3
7
5L
S T B Y _ S W
STBY_SW
8
R 1 0 1 3
2 2
VRSEL1_b0
VRSEL1_b0
9
R 1 0 1 4
2 2
VRSEL1_b1
VRSEL1_b1
1 0
VR_IN0
VR_IN0
1 1
VR_IN1
VR_IN1
1 2
VR_IN2
VR_IN2
1 3
VR_IN3
VR_IN3
1 4
VR_IN5
VR_IN5
1 5
VR_IN6
VR_IN6
1 6
VR_IN4
VR_IN4
1 7
VR_IN7
VR_IN7
1 8
V+3R3VREF1
V+3R3VREF1
1 9
D
GNDREF1
GNDREF1
2 0
VR_BOOTH
2 1
R 1 0 3 6
N M
VR_CFD
2 2
R 1 0 3 7
1 0 0 k
VR_FD2
2 3
R 1 0 3 8
1 0 0 k
VR_FD3
2 4
R 1 0 3 9
1 0 0 k
VR_FD1
2 5
R 1 0 4 0
1 0 0 k
VR_FD4
2 6
R 1 0 4 1
1 0 0 k
V+3R3VREF2
2 7
GNDREF2
GNDREF2
2 8
V+3R3STBY
2 9
V+3R3D
R 1 7 9 9
E
1 0 k
3:7H
R E T U R N _ I N
H
3/3
RESET
1
H
3/3
V+3R3S
R 1 0 3 5
10B;3:12D
P O W E R _ R E S E T _ 0 2
1 k
IC1001
V+3R3S
1
5
V O U T
C T
2
V D D
3
4
G N D
N C
BU4230G
F
GNDD
GNDD
H
1/3
84
1
2
V+3R3D
R 1 8 2 4
8 1
P120/INTP0/EXLVI
1 0 k
R 1 8 2 5
8 2
P47/INTP2
1 0 k
8 3
R 1 8 2 6
P46/INTP1/TI05/TO05
1 0 k
R 1 8 2 7
8 4
P45/SO01
1 0 k
R 1 8 2 8
8 5
P44/SI01
1 0 k
R 1 8 2 9
8 6
P43/xSCK01
1 0 k
8 7
P42/TI04/TO04
R 1 0 5 6
1 0 k
8 8
P41/TOOL1
R 1 0 5 7
8 9
1 0 k
P40/TOOL0
C 1 0 0 7
R 1 0 4 4
0 . 0 1 u / 5 0
9 0
xRESET
0
9 1
R 1 8 3 0
P124/XT2
1 0 k
R 1 8 3 1
9 2
P123/XT1
1 0 k
9 3
12J
FLMD0
C L K _ 2 0 M _ S C P U _ 0 2
9 4
P122/X2/EXCLK
9 5
R 1 0 5 2
P121/X1
1 0 k
9 6
C 1 0 0 9
REGC
YF
1 u / 1 0
9 7
VSS
9 8
EVSS0
9 9
C 1 0 1 0
R 1 0 6 0
VDD
1 0 0
0 . 1 u / 2 5
0
EVDD0
V+3R3S
1/8W
C 1 0 1 3
1 0 0 u / 1 0
R 1 0 4 5
1 0 k
Q 1 0 0 1
2 S C 4 1 5 4 ( E F G )
GNDD
V+3R3D
C N 1 0 0 4
Debug Port
V+3R3D
1
DAN217U
RESET_OUT
2
DAN217U
RESET_IN
3
D1036
RxD
4
DAN217U
D1037
FLMDO
5
CLK_IN
6
D1038
GNDD
7
V K N 1 9 4 5 - A
GNDD
V+3R3D
STBY
5
IC1004
5
1
2:11H;2:2F
VCC
INB
2
D S P _ R E S E T _ 0 2
INA
4
3
OUTY
GND
H
2/3
NM
GNDD
GNDD
R 1 0 5 5
0
4
H
3/3
A D / D A _ R E S E T _ 0 1
3:7E
VR_BOOTH
VR_CFD
VR_FD2
VR_FD3
V+3R3S
VR_FD1
V+3R3D
VR_FD4
V+3R3VREF2
V+3R3STBY
8 1
3
P120/INTP0/EXLVI
R 1 5 1 6
8 2
P47/INTP2
9C
1 0 k
8 3
F P G A _ X P G M
P46/INTP1/TI05/TO05
R 1 0 4 9
16I
8 4
1 0 k
F P G A _ S O _ 0 1
P45/SO01
R 1 0 5 0
12I
8 5
1 0 k
P44/SI01
F P G A _ R E S E T _ 0 1
R 1 5 0 8
16G
8 6
1 0 k
P43/xSCK01
F P G A _ S C K _ 0 1
8 7
P42/TI04/TO04
16H
R 1 0 5 8
8 8
F P G A _ D O N E
1 0 k
P41/TOOL1
R 1 0 5 9
2
8 9
1 0 k
P40/TOOL0
R 1 0 4 7
9 0
xRESET
C 1 0 0 8
0
0 . 0 1 u / 5 0
9 1
R 1 8 0 0
P124/XT2
1 0 k
9 2
R 1 8 0 1
P123/XT1
1 0 k
9 3
11K
FLMD0
C L K _ 2 0 M _ C P U _ 0 2
9 4
P122/X2/EXCLK
C 1 5 5 1
R 1 7 9 8
0 . 0 1 u / 5 0
9 5
P121/X1
1 0 0
C 1 0 1 1
9 6
REGC
YF
1 u / 1 0
9 7
VSS
9 8
EVSS0
9 9
C 1 0 1 2
VDD
1 0 0
EVDD0
R 1 0 6 1
0 . 1 u / 2 5
0
C 1 0 1 4
1/8W
1 0 0 u / 1 0
V+3R3D
C N 1 0 0 5
V+3R3S
Debug Port
V+3R3D
1
DAN217U
RESET_OUT
2
DAN217U
RESET_IN
3
D1039
RxD
DAN217U
4
D1040
FLMDO
5
CLK_IN
6
D1041
GNDD
7
V K N 1 9 4 5 - A
GNDD
2
3
51.
AVSS
52.
P157/ANI15
76.
P144/SO20/TxD2
P143/SI20/RxD2/SDA2
77.
78.
P142/xSCK20/SCL2
79.
P141/PCLBUZ1/INTP7
80.
P140/PCLBUZ0/INTP6
I C 1 0 0 6
D Y W 1 7 8 3
UPD78F1164AGF-GAS
SUB CPU
1.
P60/SCL0
29.
P30/INTP3/RTC1HZ
30.
EVDD1
V+3R3S
6
R T 1 P 2 4 1 M
Q 1 0 0 2
H
3/3
7
3:12D
C P U _ M U T E _ 0 2
H
3/3
8
51.
P157/ANI15
52.
AVSS
P144/SO20/TxD2
76.
77.
P143/SI20/RxD2/SDA2
78.
P142/xSCK20/SCL2
79.
P141/PCLBUZ1/INTP7
80.
P140/PCLBUZ0/INTP6
I C 1 0 0 7
D Y W 1 7 8 2
UPD78F1166AGF-GAS
MAIN CPU
1.
P60/SCL0
29.
P30/INTP3/RTC1HZ
30.
EVDD1
3:7G
C H 2 _ S E L 2
3:7G
F S 1 +
3:7G
C H 2 _ S E L 1
3:7G
H
3:7G
F S 1 -
C H 1 _ S E L 2
3:7G
3:7G
F S 2 +
C H 1 _ S E L 1
3:7G
F S 2 -
H
3/3
2F
STBY_SW
S T B Y _ S W
2F
STBY_LED
S T B Y _ L E D
11J
CLK_CTRL
C L K _ C T R L
DJM-5000
3
4
C 1 0 1 9 1 0 0 0 p / 5 0
C 1 0 2 0 1 0 0 0 p / 5 0
V+3R3VREF1 V+3R3D
C 1 0 2 1 1 0 0 0 p / 5 0
L 1 0 0 1
C 1 0 2 2 1 0 0 0 p / 5 0
3 3 u
C 1 0 2 3 1 0 0 0 p / 5 0
C 1 0 2 4 1 0 0 0 p / 5 0
C 1 5 3 4 1 0 0 0 p / 5 0
C 1 5 3 5 1 0 0 0 p / 5 0
0
R 1 1 5 4
1/8W
GNDREF1
GNDD
5 0
AVREF0
4 9
R 1 8 1 9
P111/ANO1
1 0 k
4 8
R 1 8 2 0
P110/ANO0
1 0 k
4 7
AVREF1
R 1 8 2 1
4 6
1 0 k
P10/EX24/xSCK00
4 5
R 1 1 4 1
1 0 0 k
SEG_R14_01
P11/EX25/Si00/RxD0
4 4
R 1 1 4 2
1 0 0 k
SEG_R13_01
P12/EX26/SO00/TxD0
R 1 1 4 3
4 3
1 0 k
P13/EX27/TxD3
R 1 1 4 4
4 2
1 0 0 k
SEG_R11_01
P14/EX28/RxD3
R 1 1 4 5
4 1
1 0 0 k
SEG_R10_01
P15/EX29/RTCDIV/RTCCL
R 1 1 4 6
4 0
1 0 0 k
SEG_R9_01
P16/EX30/TI01/TO01/INTP5
R 1 1 4 7
3 9
1 0 0 k
SEG_R8_01
P17/EX31/TI02/TO02
3 8
SCPU_DATA15_01
P57/EX15
3 7
SCPU_DATA14_01
P56/EX14
3 6
SCPU_DATA13_01
P55/EX13
3 5
SCPU_DATA12_01
P54/EX12
3 4
SCPU_DATA11_01
P53/EX11
3 3
SCPU_DATA10_01
P52/EX10
3 2
SCPU_DATA9_01
P51/EX9
3 1
SCPU_DATA8_01
P50/EX8
GNDD
H
3/3
C 1 0 2 5
4 7 0 p / 5 0
V+3R3VREF2
V+3R3D
4 7 0 p / 5 0
C 1 0 2 6
4 7 0 p / 5 0
L 1 0 0 2
C 1 0 2 7
4 7 0 p / 5 0
C 1 0 2 8
3 3 u
4 7 0 p / 5 0
C 1 0 2 9
4 7 0 p / 5 0
C 1 0 3 0
0
R 1 1 5 5
1/8W
GNDREF2
GNDD
5 0
AVREF0
4 9
R 1 7 5 5
P111/ANO1
1 0 k
4 8
R 1 7 5 6
P110/ANO0
1 0 k
4 7
AVREF1
4 6
2 2
R 1 1 5 1
P10/EX24/xSCK00
R 1 1 3 8
C 1 0 3 9
4 5
R 1 1 5 2
0 . 1 u / 2 5
2 2
P11/EX25/Si00/RxD0
0
4 4
R 1 1 5 3
1/8W
2 2
P12/EX26/SO00/TxD0
4 3
R 1 1 4 8
P13/EX27/TxD3
1 0 k
4 2
R 1 1 4 9
P14/EX28/RxD3
1 0 k
4 1
R 1 1 3 9
2 2
P15/EX29/RTCDIV/RTCCL
4 0
R 1 1 4 0
2 2
P16/EX30/TI01/TO01/INTP5
3 9
P17/EX31/TI02/TO02
3 8
MCPU_DATA15_01
P57/EX15
3 7
MCPU_DATA14_01
P56/EX14
3 6
MCPU_DATA13_01
P55/EX13
3 5
MCPU_DATA12_01
P54/EX12
3 4
MCPU_DATA11_01
P53/EX11
3 3
MCPU_DATA10_01
P52/EX10
3 2
MCPU_DATA9_01
P51/EX9
3 1
MCPU_DATA8_01
P50/EX8
H
3/3
GNDD
3:7I
U S B _ R E S E T
3/3
4
3I
F P G A _ X P G M
DSP_DATA0_02
DSP_DATA1_02
DSP_DATA2_02
DSP_DATA3_02
DSP_DATA4_02
DSP_DATA5_02
DSP_DATA6_02
DSP_DATA7_02
DSP_DATA15_0
DSP_DATA14_0
DSP_DATA13_0
DSP_DATA12_0
DSP_DATA11_0
DSP_DATA10_0
DSP_DATA9_02
DSP_DATA8_02
CS_FPGA_01
DSP_ADRS10
DSP_ADRS9
DSP_ADRS8
WE_BUS
RE_BUS
DSP_ADRS0
DSP_ADRS1
DSP_ADRS2
DSP_ADRS3
DSP_ADRS4
DSP_ADRS5
DSP_ADRS6
DSP_ADRS7
CLK_BUS_01
3:7D
D I R _ S C K _ 0 2
3:7D
D I R _ S I _ 0 2
H
3/3
3:7D
D I R _ S O _ 0 2
3:7D
D I R _ C S 1 _ 0 2
3:7D
D I R _ C S 0 _ 0 2
16I
F P G A _ X I N I T
V+3R3S
IC1008
1
NC
2
INA
3
GND0
TC7SHU04FU
R 1 1 5 8
GNDD
1 M
X1001
V S S 1 1 8 6 - A
1
3
2
GNDD
20MH

Advertisement

Table of Contents
loading

Table of Contents