Block Diagram Of Rp Board - Furuno FR-2115 Service Manual

Block Diagram of RP Board

The RP System program is stored on the flash POM, U3 and the program update is performed by
using the program card. The card must be inserted into the upper slot.
The CR1 on the RP board lights when the program is replaced with new one.
RP marks are generated in the following VRAMs or frames on the RP board respectively, and
sent to the SPU board.
1) Track, Mark, and Depth line, etc.;
Uses frames 1 (R:U51), 2 (G:U52) and 3 (B:U53)
2) Grid; uses frames 3 (U53) and 4 (U50)
3) Counter line, and coated land area; uses frame 5 (U49)
Note that waypoint and nav line data is memorized by the SPU board.
P.F
(Activated by H)
To SPU Board
(Communication Data)
IF Board
14P0299
Memory Card
(4 M bytes)
Power Fail
DIP SW
U15
INT 2
CR1
(PF)
INT 0
(VSYNC)
CPU (FR-30)
Address &
Data Bus
U13
INT 1
x4(50 MHz)
(DPRAM)
OSC
12.5 MHz
U17
Dual Port RAM
RAM
8 K bytes
U4
Buffer
U22,23,27,
30,31,32
OSC
U16
32 MHz
I/O Port
U21
Figure 2.13 Block Diagram of RP Board
DRAM
*Working area for running program
2 M bytes
U2
SRAM
Battery
256 K bytes
Back-up
U8,9
U5
Flash Memory
1M bytes U3
*Memory for Track & Mark
Real Time
Clock
U1
*(not used)
Addres & Data
AGDC 2
Multiplexer U14
U28,29
AGDC 2
Controller
U15
2-22
To SPU Board
(HSYNC, VSYNC,CLK)
Character Gen.
U33
Addres & Data
Multiplexer
U18,19,20,24,25,26,35
VRAM 4 M bits
(5 frames)
U49 53
'
To SPU Board
Horizontal Scroll
(Video Data)
ASIC
U36
FR2115-SME-18