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The DAC38RF8xEVM is the family of circuit boards for evaluating the DAC38RFxx family of high-speed
digital-to-analog converters (DACs) from Texas Instruments. The DAC38RF8xEVM family consists of the
DAC38RF80EVM, DAC38RF87EVM, DAC38RF82EVM, DAC38RF86EVM, and DAC38RF89EVM. This
user's guide is applicable to all the EVMs in the DAC38RF8xEVM family. This document is intended to
guide the DAC38RF8xEVM user through the process of setting up the EVM successfully. For other
information on the DAC38RFxx device family, refer to the device datasheet (SLASEA3, SLASEA6, and
SLASEF4). Throughout this document, italics are used to refer to names of controls on graphical user
interfaces (GUI).
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1.2
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Appendix A
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Appendix B
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SLAU671A - October 2016 - Revised March 2017
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Copyright © 2016-2017, Texas Instruments Incorporated
SLAU671A - October 2016 - Revised March 2017
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Table of Contents
Related Manuals for Texas Instruments DAC38RF8xEVM Series
Summary of Contents for Texas Instruments DAC38RF8xEVM Series
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Page 1: Table Of Contents
DAC38RF8xEVM The DAC38RF8xEVM is the family of circuit boards for evaluating the DAC38RFxx family of high-speed digital-to-analog converters (DACs) from Texas Instruments. The DAC38RF8xEVM family consists of the DAC38RF80EVM, DAC38RF87EVM, DAC38RF82EVM, DAC38RF86EVM, and DAC38RF89EVM. This user's guide is applicable to all the EVMs in the DAC38RF8xEVM family. This document is intended to guide the DAC38RF8xEVM user through the process of setting up the EVM successfully. -
Page 2: Introduction
DA38RF8x IOUTB+ 1.8 V IOUTB> + CLKIN > + CLKTX> NCR2-113+ TCM2-43X+ 1:2 Power SMA J1 Splitter Figure 1. DAC38RF8xEVM Block Diagram DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... - Page 3 DAC in this mode. For best spurious performance, also install C1, C333, and C334 on the EVM to switch to differential clock input of DAC. Refer to the schematics and BOM of the EVM for the component values (SLAC734). SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated...
- Page 4 EVM GUI in a later step. Connect the reference of the two signal generators together. 3. Remove the shunt on pins 1 and 2 of jumper JP10 DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated...
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Page 5: Quick Start
These changes are described in Section 1.2.1. Figure 2. Shunt Pin 1 and Pin 2 of JP10 Jumper Enabling External Clock Mode SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 6: Dac38Rf83 Evm Setup For External Clock Mode
If the DAC clock frequency entered is not supported for the selected mode, the DAC clock frequency box blinks. DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 7: Dac38Rf8Xevm Gui Quick Start Page Configured For External Clock Mode
DAC in the preceding step 6, navigate to DAC38RF8x>>Clocking tab and de-select the External Clock Select checkbox. Figure 5. DAC38RF8xEVM GUI External Clock Select Checkbox SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 8: Open Pin 1 And Pin 2 Of Jp10 Jumper To Enable On-Chip Pll Clock Mode
These changes are described in Section 1.2.1. Figure 6. Open Pin 1 and Pin 2 of JP10 Jumper to Enable On-Chip PLL Clock Mode DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 9: Dac38Rf83 Evm Setup For On-Chip Pll Mode
The DAC PLL clock frequency is 4915.2 MHz. 5. Specify the desired number of DACs (Dual DAC), number of IQ pairs (1 IQ pair), number of lanes (4 SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 10: Dac38Rf8Xevm Gui Quick Start Page Configured For On-Chip Pll Mode
9. Click on Reset DAC JESD Core & SYSREF TRIGGER button. 2.1.6 High Speed Data Converter Pro (HSDC Pro) 1. Open High Speed Data Converter Pro by going to Start Menu → All Programs → Texas Instruments → High Speed Data Converter Pro. 2. Select the DAC tab. -
Page 11: Load Firmware To The Tsw14J56
9. Switch back to the DAC38RF8x GUI, and from the Quick Start page, click the Reset DAC JESD Core button to reset the RFDAC JESD204B core and also select the Trigger LMK04828 SYSREF button to trigger the SYSREF signal. SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 12: Dac A Digital Control Tab Of The Dac38Rf8X Gui
The Output sum selector of the DAC can be used to add both signals at 1960.1 MHz and 2141 MHz and output through DAC A as shown in Figure DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 13: Dac A Output At 1960 Mhz And 2140 Mhz, Mixer Gain Off, Dummy Date Enabled
Figure 13. 1×20 MHz LTE, TM3.1, Center Frequency = 1960 MHz, DAC Coarse Gain = 10, External Clock SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 14: 14 1×20 Mhz Lte, Tm3.1, Center Frequency = 2140 Mhz, Dac Coarse Gain = 10, External Clock
Figure 14. 1×20 MHz LTE, TM3.1, Center Frequency = 2140 MHz, DAC Coarse Gain = 10, External Clock DAC38RF83 DAC38RF80 D001 Frequency (Hz) Figure 15. DAC Output Power vs Frequency (Fsampling = 8847.36 Msps) DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 15: Generating Configuration Files For Custom Boards
Also, read and write actions can be performed on this specific register using the Write Register and Read Register buttons in the lower right corner of the GUI (see Figure 17). SLAU671A – October 2016 – Revised March 2017 DAC38RF8xEVM Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 16: Dac38Rf8Xevm Gui Low Level View
Generating Configuration Files for Custom Boards www.ti.com Figure 17. DAC38RF8xEVM GUI Low Level View DAC38RF8xEVM SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 17: Dac Output Circuit Schematic
Average Insertion Loss Input Return Loss Frequency (MHz) Frequency (MHz) Phase Unbalance Amplitude Unbalance Frequency (MHz) Frequency (MHz) Figure 19. TCM3-452X-1+ Frequency Response SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... -
Page 18: Clock Input Path Circuit Diagram
Input Return Loss Average Insertion Loss Frequency (MHz) Frequency (MHz) Amplitude Unbalance Phase Unbalance Frequency (MHz) Frequency (MHz) Figure 21. NCR2-113+ Frequency Response SLAU671A – October 2016 – Revised March 2017 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated... - Page 19 • Included information on configuration file generation in Section 3 ..............• Added Removed Known Issues section from before Appendix A. SLAU671A – October 2016 – Revised March 2017 Revision History Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated...
- Page 20 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 21 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 22 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
- Page 23 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated...
- Page 24 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...
- Page 25 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments DAC38RF86EVM DAC38RF87EVM DAC38RF89EVM...