Sch09_Sub Cpu - Denon AVR-X6200W Service Manual

1 2 3
A
3B 2C 5C
TO B3 TO C2 TO C5
B
C
D
E
F
G
U5006
OPEN
20
C2195
1 VCC
0.1 3 17
19
GND
10
FPGAWRITE
H
N2102
U5006
OPEN
OPEN
1
GnCONFI G R2161 OPEN SnCONFIG
18 2
2
GASDO R2162 OPEN SUBASDI
16 4
3
GCNFG_DONE SCNFG_DONE
15 5
4
GnCS R2163 OPEN SUBnCS
14 6
5
GDATA_O SUBDATA_O
13 7
6
GDCLK R2164 OPEN SUBDCLK
12 8
7
GnCE R2160 OPEN SUBnCE
9 11
8
DGND
9
J
K
L
M
GND LINE POWER+ LINE POWER- LINE AUDIO SIGNAL
1 2 3
4 5 6
6C 7C 8C D4
TO C6 TO C7 TO C8 TO 4D
R2145 4.7K
R2154 10K
DAC_RST2 R2041
33
75 74 73 72 71 70 69 68 67 66 65
R2112 33x4
DAC_CCS2
8 7
R2103 33
SUB_TDO
76 PE2
R2109 33
SUB_TMS
77 PE1
DAC_RST1 R2042 33
78 PE0
DSP2_FLAG3
79 PD7
R2112 33x4
DAC_CCLK
80 PD6
DAC_CDATA R2112 2 33x4 1
81 PD5
DAC_CCS1 R2112 4 3 33x4
82 PD4
DSP4_RST 6 5
83 PD3
DSP1_RST
84 PD2
U2101
DSP1_CS
85 PD1
DSP1_FLAG3
86 PD0
DSP1_FLAG0
87 P47
R5F5210ABDF P
DSP2_RST
88 P46
DSP2_CS
89 P45
DSP2_FLAG0
90 P44
DSP4_FLAG0
( S U B )
91 P43
DSP3_RST
92 P42
DSP3_CS
93 P41
94 VREFL0
DSP3_FLAG0
95 P40
C2183 0. 1
96 VREFH0
C2184 1000P
97 AVCC0
DSP4_CS
98 P07
99 AVSS0
TXEN
100P05
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
R2165 OPEN
R2166 OPEN
R2107 10K
R2152 47K
R2106
OPEN
X2101
12MHz
TMDS SIGNAL ANALOG VIDEO DIGITAL VIDEO
4 5 6
7 8 9 10
D5 D6 D7 D8
TO 5D TO 6D TO 7D TO 8D
U2102
OPEN
4 NC 3
DA C2191
GND
2
0.1
5 SC VCC 1
64 63 62 61 60 59 58 57 56 55 54 53 52 51
DSP_MISO
50
RXD5
R2108 33 DSP_MOSI
TXD5 49
HINSEL C
PC4 48
HINSELB
47
PC5
HINSELA
PC6 46
PC7/UB 45
R2146 33 SD/HD
P50 44
DE_RST
43
P51
IP_RST
P52 42
SW1_HINT
P53 41
SW2_RST
P54 40
SW2_HINT
39
P55
SW1_RST
PH0 38
TX_HIN T CEC_IN
PH1 37
R2124 10
HSCL
36
PH2
R2123 10
HSDA
PH3 35
TX_RST
P12 34
Z3PLDAERR
P13 33
Z2PLDAERR
32
P14
SUB_BDOWN
P15 P15 31
R2122 33 DIRDIN
P16
P16 30
DIRRSTMAIN
P17 29
R2121 33
SOMI
28
TXD0
SIMO
RXD0 27
R2120 33 CLKSIM O
SCK0 26
232OSCPI
1 3
232ISCPO
RSTSUB
SUBUPDATE
7 8 9 10
143
11 12 13
D9 E0 3D 7A
TO 9D TO 0E TO D3 TO A7
R215 8
22K
R2137
R2132
4.7K 47K
CEC_I R213 3 R2138
1M 1M
R2139
220K
MD
UB
232OSCPI
232ISCP O
N2101
Q2103 Q2105
KRC402E-RTK KRC402E-RTK
8 U - 3 1 0 2 0 2 ( 9 / 1 8 )
D I G I T A L _ U N I T
SCHEMATIC DIAGRAMS (09/33)

SCH09_SUB CPU

11 12 13
14 15 16
A
B
C
D
E
F
G
H
NC
11
NC
10
NC
9
J
8 NC
MD
7
UB
6
5 GND
4 RXD
TXD
3
3.3V
2
1 SUBRESET
OPEN
K
L
M
14 15 16