Schematic Diagram - Fpga Dsp Board (3/3) - Sony HAP-Z1ES Service Manual

Hdd audio player
Hide thumbs Also See for HAP-Z1ES:
Table of Contents

Advertisement

5-20. SCHEMATIC DIAGRAM - FPGA DSP Board (3/3) -

1
2
3
FPGA DSP BOARD
A
B
C615
C612
0.1
0.1
C625
0.1
C624
C
0.1
C622
0.1
C621
0.1
C617
0.1
D
C613
0.1
C610
0.1
CL601
CL602
C604
CL603
0.1
E
CL604
CL605
C606
0.1
CL606
CL607
C607
CL608
0.1
C608
0.1
F
C609
0.1
C614
0.1
C616
0.1
G
C618
0.1
C602
10
C601
10
H
R603
33
R601
0
SHARC_CORE_1.1V
SHARC_3.3V
(Page 53)
R602
0
>132S
FPGA DSP
BOARD
I
(1/3)
GND
VDD_3.3V
HAP-Z1ES
• See page 70 for Waveforms. • See page 75 for IC Pin Function Description.
4
5
6
7
(3/3)
R604 68
R605 33
R607 33
R609 33
R611 33
15
13
14
R613 33
C603
C605
C611
C620
C623
C626
10
0.1
12
0.1
0.1
0.1
0.1
DAI_P10
1.1
51
VDD_INT
3.3
52
VDD_EXT
53
DAI_P20
54
1.1
VDD_INT
55
DAI_P08
56
DAI_P04
57
DAI_P14
58
DAI_P18
nRESETOUT/nRESETIN
59
DAI_P17
60
DAI_P16
IC601
61
DAI_P15
62
DAI_P12
AUDIO DSP
1.1
63
IC601
VDD_INT
ADSP-21488KSWZ-3A1
1.6
64
DAI_P11
1.1
65
VDD_INT
1.1
66
VDD_INT
67
GND
68
THD_M
69
THD_P
70
VDD_THD
1.1
71
VDD_INT
1.1
72
VDD_INT
1.1
73
VDD_INT
74
1.1
VDD_INT
75
RB601
R608
R614
R615
C619
2.2k
0
0
0
0.01
8
9
10
11
DATA_IN_SHARC
LRCLK_OUT_SHARC
BCLK_OUT_SHARC
DATA_OUT
LRCLK_OUT
BCLK_OUT
R624
DPI_P06
CL627
22
25
3.2
DPI_P04
22M_OE
24
CL628
DPI_P05
24M_OE
23
1.1
R626
VDD_INT
22
22
CL629
3.2
SDK_DSP
DATAL_DSDLD
DPI_P03
21
3.2
CL630
R627 22
SDI_DSP
DPI_P02
DATAR_DSDRD
20
0
CL631
SDO_DSP
DPI_P01
19
1.1
R628
R636
VDD_INT
22
330
X601
18
CL632
10MHz
128FS_IN
17
1.1
VDD_INT
16
1.1
VDD_INT
11
15
3.3
CS_DAC
VDD_EXT
R633
14
1.6
1M
XTAL
SDO_DAC
13
1.5
CLKIN
SDK_DAC
12
1.1
VDD_INT
11
0
CLK_CFG0
10
R638
NC
10k
9
NC
8
GND
7
0
R635
10k
BOOT_CFG1
6
1.1
VDD_INT
5
3.3
VDD_EXT
R632
10k
4
0
BOOT_CFG0
BCLK_OUT
R629
0k
3
3.2
CLK_CFG1
LRCLK_OUT
2
1.1
DATA_OUT
VDD_INT
1
DATA_IN_SHARC
CL626
RST_DSP
R617
100
55
55
12
13
14
15
IC001
(4/4)
FPGA
CSP
(Chip Size Package)
IC001
EP4CGX30BF14C8N
BANK 3
N4
L4
CL501
IO/DIFFIO_B1P/CRC_ERROR
IO/PLL1_CLKOUTP
N5
M4
IO/DIFFIO_B1N/NCEO
IO/PLL1_CLKOUTN
L5
IO/DQS1B/CQ0B#/DPCLK2
L7
N6
IO/VREFB3N0
IO/DIFFIO_B3N/DQ0B
BANK 4
N8
K10
IO/DIFFIO_B12P/DQ0B
IO/PLL3_CLKOUTP
N9
L11
IO/DIFFIO_B12N/DQ0B
IO/PLL3_CLKOUTN
K8
L9
IO/VREFB4N0
IO/DIFFIO_B19P/DQ0B
K9
M9
IO/DQ0B
IO/DIFFIO_B19N/DQS0B/CQ0B/DPCLK5
M11
N10
IO/RUP2/DQ0B
IO/DIFFIO_B21P/DQ0B
N12
N11
IO/RDN2/DM0B
IO/DIFFIO_B21N/DQ0B
R581
10k
M7
CLK14/DIFFCLK_6P
N7
CLK15/DIFFCLK_6N
R582
10k
R512
BANK 5
10
H10
J13
IO/DQS1R/CQ0R#/DPCLK7
IO/DIFFIO_R9N/DQ0R
R513
10
H12
K13
IO/VREFB5N0
IO/DIFFIO_R9P/DQ0R
L12
R514
IO/DIFFIO_R13P/DQ0R
220
FB501
N13
L13
IO/RUP3
IO/DIFFIO_R13N/DQ0R
M13
K11
IO/RDN3
IO/DIFFIO_R14P/DQ0R
R515
K12
R580
100
IO/DIFFIO_R14N/DQ0R
10k
H13
CLK5/DIFFCLK_2P
CL520
G13
CLK4/DIFFCLK_2N
R518
470
R519
BANK 6
10
D11
F10
IO/DIFFIO_R2P
IO/DIFFIO_R5P/DQ0R
R520
10
D12
F11
IO/DIFFIO_R2N
IO/DIFFIO_R5N/DQ0R
R521
10
E10
G9
IO/DIFFIO_R4P/DM0R
IO/DIFFIO_R6P/DQS0R/CQ0R/DPCLK8
F9
G10
IO_F9
IO/DIFFIO_R6N/DEV_OE
CL502
R522
E13
10
IO/VREFB6N0
R523
10
F12
CLK7/DIFFCLK_3P
F13
CLK6/DIFFCLK_3N
R524
10
BANK 7
A12
C8
R526
IO/DIFFIO_T11P/DM0T
IO/DIFFIO_T12P/DQ0T
10
A11
B8
IO/DIFFIO_T11N/DQ0T
IO/DIFFIO_T12N/DQ0T
R527
10
B11
B13
IO_B11
IO/DIFFIO_T17P/DQ0T
B10
A13
IO/VREFB7N0
IO/DIFFIO_T17N/DQS0T/CQ0T/DPCLK10
R528
C11
D13
10
IO/RUP4/DQ0T
IO/DIFFIO_T18P/DQ0T
C12
C13
IO/RDN4/DQ0T
IO/DIFFIO_T18N/DQ0T
R531
10
CL521
A10
CLK9/DIFFCLK_5P
CL522
A9
CLK8/DIFFCLK_5N
R532
10
BANK 8
A6
A8
IO/CLKUSR
IO/PLL2_CLKOUTP
R570
R534
B6
A7
10k
10
IO/DQS1T/CQ0T#/DPCLK13
IO/PLL2_CLKOUTN
C6
IO/VREFB8N0
BANK 9
CL503
C5
N2
IO/NCSO
NC_N2
CL504
B5
M3
IO/ASDO
NC_M3
Note: IC001 and IC601 on the FPGA DSP board cannot exchange with single.
When these parts are damaged, exchange the complete mounted board.
HAP-Z1ES
16
17
18
19
CN506
24P
1
DACGND
DATAR_DSDRD
CL505
2
DATAR_DSDRD
3
DACGND
CL506
DATAL_DSDLD
4
DATAL_DSDLD
5
DACGND
CL507
WDCKL_DSDL
6
WDCKL_DSDL
7
DACGND
CL508
WDCKR_DSDR
8
WDCKR_DSDR
AMUTE
CL509
9
AMUTE
R576
2.2k
10
CTRLGND
CL510
RST_DAC
FFC2
11
RESET
CL511
SDK_DAC
12
MC
>09S
CL512
SDO_DAC
13
MDI
CL513
CS_DAC
AUDIO
14
ZMS
BOARD
R577
2.2k
15
CTRLGND
CN103
BCK-L
CL514
(Page 57)
16
BCK-L
CL515
DSD_XPCM
17
DSD_XPCM
CL516
24M_OE
18
24M_OE
CL517
22M_OE
19
22M_OE
R578
2.2k
20
CLKGND
CL518
128FS_IN
21
FS128IN
R579
2.2k
22
CLKGND
CL519
23
FS512IN
24
CLKGND
R548
R575
FB502
220
0
BCK-L
R549
100
WDCKR_DSDR
R550
10
DSD_XPCM
R551
100
WDCKL_DSDL
R552
10
RST_DAC
AMUTE
R553
10
R554
10
SDI_DSP
R555
10
SDO_DSP
R556
10
SDK_DSP
RST_DSP
R557
10
R558
10
R559
10
R560
10
LRCLK_OUT_SHARC
R561
10
BCLK_OUT_SHARC
>135S
FPGA_INTERRUPT
R562
10
FPGA DSP
BOARD
(2/3)
(Page 54)

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents