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Programming Considerations
This attachment consists of an 8-bit digital output register in
parallel with a NEC JLPD765 or equivalent floppy disk controller
~
(FDC).
In the following description, drive numbers 0, 1, 2, and 3 are
equivalent to drives A,
B,
C, and D.
Digital-Output Register
OJ
/ ..
The Digital-Output register (DOR) is an output-only register used
to control drive motors, drive selection, and feature enable. All
bits are cleared by the
II
0
interface 'reset' line. The bits have the
following functions:
Bits 0 and 1
These bits are decoded by the hardware to
select one drive if its motor is on:
Bit
1 0
Drive
00
o
(A)
01
1 (B)
10
2 (C)
1 1
3 (D)
Bit 2
The FDC is held reset when this bit is clear.
It
must be set by the program to enable the
FDC.
Bit 3
This bit allows the FDC interrupt and DMA
requests to be gated onto the I/O interface.
If this bit is cleared, the interrupt and DMA
request I/O interface drivers are disabled.
Bits 4,5,6,
These bits control, respectively, the motors of
and 7
drives 0, 1,2 (A, B, C), and 3 (D).
If
a bit is
clear, the associated motor is off, and the
drive cannot be selected.
Diskette Adapter 3
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