Pioneer PD-30-K Service Manual page 20

1
• Pin Function
A
Category
Power supply VCC1, VCC2,
input VSS
Analog power supply AVCC, AVSS
input
Reset input
RESET
CNVSS CNVSS
External data bus BYTE
B switch input
Bus control pin D0 - D7
D8 - D15
A0 - A19
CS0 - CS3
WRL/WR,
WRH/BHE,
RD
C
ALE
HOLD
HLDA
RDY
Main clock input XIN
Main clock output XOUT
D
Sub clock input XCIN
Sub clock output XCOUT
Clock output CLKOUT
INT interrupt input INT0 - INT4
NMI interrupt input NMI
Key input interrupt input
KI0 - KI3
Timer A TA0OUT - TA2OUT
TA0IN - TA2IN
Timer B TB0IN - TB2IN
Serial interface
CTS0 - CTS2
E
RTS0 - RTS2
CLK0 - CLK2
RXD0 - RXD2
TXD0 - TXD2
CLKS1
2
I C mode SDA0 - SDA2
SCL0 - SCL2
F
20
1
2
Pin Name I/O
I/O Input 2.7 V - 5.5 V into VCC1, VCC2. The input condition is VCC1 = VCC2.
Input 0 V into VSS.
I Power supply input of the A/D converter.
Connect AVCC to VCC1. Connect AVSS to VSS.
I The microcomputer becomes the reset state when you input "L" into this terminal.
0 Be terminals to change a processor mode. After reset, when IC start a working
with a single chip mode, connect it to VSS, when IC start a working with a
microprocessor mode, connect to VCC1.
I Be terminals to switch an external data bus. In the case of "L" this terminal becomes
16 bits, in the case of "H" this terminal becomes 8 bits.
Fix it to either. Be connected to VSS with the single chip mode.
I/O When accessed the area selecting a separate bus, input and output data (D0 - D7).
I/O When an external data bus accessed it in an area selecting a separate bus at 16 bits,
input and output data (D8 - D15).
O Output address A0 - A19.
O Chip select signals. Use it for designation of the access space.
O
Output WRL, WRH (WR, BHE), RD signals. Be changed WRL, WRH or BHE, WR by
a program.
· at WRL, WRH, RD selected
In case of external data bus is 16 bits, WRL signal is "L", writes it in the even
number address, and WRH signal is "L", writes it in the odd number address.
· at WR, BHE, RD selected
WR signal is "L", writes. RD signal is "L", read. BHE signal is "L", accesses it by
an odd number house number.
Use this mode at the external data bus is 8 bits.
O Signals for a latch to do an address.
I The microcomputer becomes the hold state the input of this terminal during a period of "L".
O During the period of the hold state, this terminal outputs "L".
I The bus of the microcomputer becomes the weight state the input of this terminal
during a period of "L".
I Input and output terminals of the main clock oscillation circuit. Connect a ceramic
resonator or a crystal oscillation child between XIN and XOUT. When you input a
O
clock formed outside, input a clock from XIN, and perform XOUT for open.
I Input and output terminals of the subclock oscillation circuit. Connect a crystal
oscillation child between XCIN and XCOUT. When you input a clock formed outside,
O
input a clock from XCIN, and perform XCOUT for open.
O Output the clock of the period same as fc, f8 or f32.
I
Input of the INT interrupt.
I
Input of the NMI interrupt.
I Input of the key input interrupt.
I/O Input and output of timer A0 - A2. (but the output of TA0OUT is N channel open drain.)
I Timer A0 - A2 input.
I Timer B0 - B2 input.
I Transmission system order input.
O Reception system order output.
I/O Transfer clock input and output.
I Serial data input.
O Serial data output. (but the output of TXD2 is N channel open drain.)
O Output of the transfer clock plural terminal output function.
I/O Serial data input and output. (but the output of SDA2 is N channel open drain.)
I/O Transfer clock input and output. (but the output of SCL2 is N channel open drain.)
2
3
Function
PD-30-K
3
4
4