Panasonic FP2 User Manual page 85

FP2 Serial Data Unit
Transmission format settings based on the shared memory
To change the values of the transmission format automatically set when the power
supply is turned on to any other desired values, the contents of the change are set in the
shared memory, and a software reset is carried out (Y1D is turned on). When the system
has confirmed that the software reset completed flag (XE) is on, the software reset (Y1D)
is turned off, and the transmission format is changed.
The transmission format setting area is addresses 1003 (COM.1) and 1004 (COM.2) of
the shared memory.
Transmission format setting item
Transmission speed 19200bps
9600bps
4800bps
2400bps
1200bps
600bps
300bps
Data length 7 bits
8 bits
Parity check Invalid
Odd parity
Even parity
Stop bit length 1 bit
2 bits
Control signals CS Invalid
and CD and CD
Valid
End code Any code (* Note)
C
C
ETX (H03)
Start code Invalid
STX (H02)
Valid
Note
The desired end code (any code) should be registered in
addresses 1001 (COM.1) and 1002 (COM.2) of the shared memory.
Bit setting of shared memory
(H0D)
R
(H0D) and LF (H0A)
R
15 to 11 10 9 8
0 0
0 1
1 0
1 1
0
1
Specifications
7.4 Transmission Format
7 6 5 4 3 2
0
0
0
1
1
1
1
0
1
0 0
0 1
1 1
0
1
0
1
1 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
7 − 9