Samsung SGH-X430 Service Manual page 11

2. SGH-X430 Circuit Description
6) Trident
Trident is consisted of ARM core and DSP core. It has 20K*16bits RAM
144K*16bits ROM in the DSP. It has 4K*32bits ROM and 2K*32bits RAM in the
ARM core. DSP is consisted of timer, one bit input/output unit(BIO), JTAG, EMI
and HDS(Hardware Development System). ARM core is consisted of EMI,
PIC(Programmable Interrupt Controller), reset/power/clock unit, DMA controller,
TIC(Test Interface Controller), peripheral bridge, PPI, SSI(Synchronous Serial
Interface), ACCs(Asynchronous communications controllers), timer, ADC,
RTC(Real-Time Clock) and keyboard interface.
DSP_AB[0~8], address lines of DSP core and DSP_DB[0~15], data lines of
DSP core are connected to CSP1093. A[0~20], address lines of ARM core and
D[0~15], data lines of ARM core are connected to memory, LCD and YMU762.
ICP(Interprocessor Communication Port) controls the communication between
ARM core and DSP core.
CSROMEN, CSRAMEN and CS1N to CS4N in the ARM core are connected to
each memory. WEN and OEN control the process of memory. External
IRQ(Interrupt ReQuest) signals from each units, such as, YMU, Ear-jack,
Ear-mic and CSP1093, need the compatible process.
Some PPI pins has many special functions. CP_KB[0~9] receive the status
from key FPCB and are used for the communicatios using data link
cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).
And UP_CS/SCLK/SDI, control signals for PSC2106 are outputted through PPI
pins. It has signal port for charging(CHG_DET), SIM_RESET and FLIP_SNS with
which we knows open.closed status of folder. It has JTAG control
pins(TDI/TDO/TCK) for ARM core and DSP core. It recieves 13MHz clock in
CKI pin from external TCXO and receives 32.768KHz clock from X1RTC.
ADC(Analog to Digital Convertor) part receives the status of temperature,
battery type and battery voltage. And control signals(DSP_INT, DSP_IO and
DSP_RWN) for DSP core are used. It enables main LCD with DSP IP pins.
7) CSP1093
CSP1093 integrates the timing and control functions for GSM 2+ mobile
application with the ADC and DAC functions. The CSP1093 interfaces to the
trident, via a 16-bit parallel interface. It serves as the interface that connects
a DSP to the RF circuitry in a GSM 2+ mobile telephone. DSP can load 148
bits of burst data into CSP1093' s internal register, and program CSP1093' s
event timing and control register with the exact time to send the burst. When
the timing portion of the event timing and control register matches the internal
quarter-bit counter and internal frame counter, the 148 bits in the internal
This Document can not be used without Samsung's authorization
SAMSUNG Proprietary-Contents may change without notice
2-7