Philips EXP 411 Service Manual page 20

7800 : SM5903BF
YBLKCK
YFCLK
YFLAG
YMDATA
YMCLK
YMLD
ZSENSE
UC1 to UC5
YDMUTE
NRESET
NTEST
VDD2
1
UC1
2
UC2
3
UC3
4
UC4
5
UC5
6
N.C
7
NTEST
8
CLK
9
VSS 10
YSRDATA
11
Output Interface
Control
Input 1
Micro-
controller
Interface
Compression
Mode
General
Port
Decoder
Control
Input 2
NWE
33
D1
32
D0
31
D3
30
D2
29
NCAS
28
A10/ NCAS2
27
YMCLK
26
YMDATA
25
24 YMLD
YDMUTE
23
3-6
Input Interface
Input Buffer
Through
Mode
Encoder
DRAM Interface
Pin number Pin name I/O
1 VDD2 -
2 UC1 Ip/O
3 UC2 Ip/O
4 UC3 Ip/O
5 UC4 Ip/O
6 UC5 Ip/O
7 N.C -
8 NTEST Ip
9 CLK I
10 VSS -
11 YSRDATA I
12 YLRCK I
13 YSCK I
14 ZSCK O
15 ZLRCK O
16 ZSRDATA O
17 YFLAG I
18 YFCLK I
19 YBLKCK I
20 NRESET I
21 ZSENSE O
22 VDD1 -
23 YDMUTE I
24 YMLD I
25 YMDATA I
26 YMCLK I
27 A10 O
(NCAS2) O
28 NCAS O
29 D2 I/O
30 D3 I/O
31 D0 I/O
32 D1 I/O
33 NWE O
34 NRAS O
35 A9 O
36 A8 O
37 A7 O
38 A6 O
39 A5 O
40 A4 O
41 A0 O
42 A1 O
43 A2 O
44 A3 O
Ip : Input pin with pull-up resistor Ip/O : Input/Output pin (With pull-up resistor when in input mode)
Function
H
VDD supply pin
Microcontroller interface extension I/O 1
Microcontroller interface extension I/O 2
Microcontroller interface extension I/O 3
Microcontroller interface extension I/O 4
Microcontroller interface extension I/O 5
Test pin
16.9344 MHz clock input
Ground
Audio serial input data
Audio serial input LR clock Left channel Right channel
Audio serial input bit clock
Audio serial output bit clock
Audio serial output LR clock Left channel Right channel
Audio serial output data
Signal processor IC RAM overflow flag
Crystal-controlled frame clock
Subcode block clock signal
System reset pin
Microcontroller interface status output
VDD supply pin
Forced mute pin Mute
Microcontroller interface latch clock
Microcontroller interface serial data
Microcontroller interface shift clock
DRAM address 10
DRAM2 CAS control (with 2 DRAMs)
DRAM CAS control
DRAM data input/output 2
DRAM data input/output 3
DRAM data input/output 0
DRAM data input/output 1
DRAM WE control
DRAM RAS control
DRAM address 9
DRAM address 8
DRAM address 7
DRAM address 6
DRAM address 5
DRAM address 4
DRAM address 0
DRAM address 1
DRAM address 2
DRAM address 3
Setting
L
Test
Overflow
Reset