Marantz SA-11S2 Service Manual page 40

Q101 : FPGA XC2S15
Pin no Signal Name
68 GND To connect GND
69 NC NC
70 TEST_3 TEST_3
71 FSIO EXT_Sampling clock(3 fs output)
72 FSI EXT_Sampling clock(3 fs input)
73 DOXCF Connect to ROM(XCF01S)1pin
74 IO_DOUT_ NC
BUSY
75 CCLK Connect to ROM(XCF01S)2pin
76 VCCO 3.3v Power supply pins for output drivers (subject to banking rules)
77 TDO JTAG terminal
78 GND GND
79 TDI JTAG terminal
80 FSX x_fs output for PLL phase comparator
81 EXT_CLK EXT_CLK(1024fs input)
82 SYCL 768fs output for Engin
83 NC NC
84 ECKO SELECT out from Switch (osc_out orEXT_CLK)
85 VCCINT 2.5v Power supply pins for the internal core logic.
86 DF-DA DIG input
87 DF-QA DIG Reclock out
88 DACL SACD or CD bit clock input
89 GND GND
90 VCCO 3.3v Power supply pins for output drivers (subject to banking rules)
91 CKI Clock Input Frequency for divider
92 VCCINT 2.5v Power supply pins for the internal core logic.
93 NC NC
94 VCCINT 2.5v Power supply pins for the internal core logic.
95 NC NC
96 EXON for VCXO Power supply control (H=on)
97 timo<0> reset3 delayed 1(1time of fs)
98 NC NC
99 TCK JTAG terminal
100 VCCO 3.3v Power supply pins for output drivers (subject to banking rules)
MODE
(H=SACD, L=CD)
3
(5=DAPC, 6=SAR)
InputX
EXOR
5, 6
2
INV
4
LRCK
7
BCLK
88
DSDO
9 DSCK
15 DSCS3
36 latchi
Timing
RESET3
10
81 EXCLK
EXT=on
H=on
Xin
CD
40
SACD
84
clkout
91
clkin
QA
88
DA
87
D Q
>
CL
R
DividerA
(
1/2)256fs
REG_on
96
Xon
A=CD, B=SACD,
43
(H= x'tal on)
C=EXT
NOR
A
16
2
B
17
Function
Data Switch
Shift Resister
and
Latch
DSPR
Divider Reset
Delay puls
10 - 20msec
DividerB 0
DividerA DividerB
(1/2)
(1/3)256fs
DividerB
(1/2)
DividerA
(
1/3)512fs
DividerA
A B C
(
1/2)256fs
O
Divider
(8fs)
Divider
(fs,2fs,4fs)
InputX/OutputX
pin no
7
D0
IMDA
EXO
D1 55
8bit
R
pin no
2
(74HC595) DATA
7
latout
95
TIM0
97
TIM1
47
A=CD, B=SACD,
C=EXT
C
out 0
B
82
768fs
A
SW
out 1
36
384fs
SW
out 2
45
192fs
A
O
B
out 3
67
C 512fs
A=CD, B=SACD,
C=EXT
SW out 4
46
D Q
8fs
>
3 FSX
FSX switch2 80
1-52
Pin Usage Pin Name
IOB
IOB IO_D2
IOB IO_D1
IOB
IOB IO_VREF_2
IOB IO_DIN_D0
IOB IO_DOUT_
BUSY
CCLK
VCCO
TDO
GND
TDI
IOB IO_CS
IOB IO_WRITE
IOB IO_VREF_1
IOB
IOB
VCCINT
IOB IO_VREF_1
IOB
GCLKIOB GCK2
GND
VCCO
GCLKIOB GCK3
VCCINT
IOB IO_VREF_0
VCCINT
IOB
IOB
IOB IO_VREF_0
IOB
TCK
VCCO
pin no
InputX OutputX
6 18
SACLO
5
DAPC 20
---- 22
SALO
----
DACLO
----
DALRO
---- 34
44 SYSO
Shift Resister(74HC595)
IMD1
D0
D2 DACRES
D3 NSH
57
D4 DCF
D5 FILTC
59
D6 FILTB
60
D7 FILTA
55 IMDA=EXOR="IMD0,IMD1"
100
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