Displays - IBM System 360 Operating Manual

READ ONLY STORAGE
II
CN
f
AQR I I W REGISTER
I
X-REGISTER I
II
P
I
0
5
I
P
I I
~ I ~
I
8 4 2 1 I
~
I
8
4
2
1
I
8
4 2
i
1
1 2 3 4 LP
4 5 6 7
0 1 2 3 4 5 6
ILSA
I
CH I Cl
I
CA
I
CB
I
CM I
CU
I CK
1
1
P
I
0
1 2
3
I
0 1 2
3
I
A 0 1 2 3
I
0 1
I
0 1 2
I
0
1
I
A
pi
o
1 2 3
I
I CR I CD I I
CF I
CG I CV I
CC I CS
I
I
P
I
0 1 2 3
I
I
0 1 2
I
0 1
I
0 1
I
0
1
2
I
A
o
1 2
3
I
C UNT REGISTER
4
1
2
2
4
5
2 1
I
P
I
8
6 7 P 0
4
1
2
2
1
3
8
4
4
5
2
6
1
7
CHANNEL NUMBER ONE
I I DATA REGISTER I
' I
I
~
I
8 4 2
~ I
8 4 2 1
I
0
1
2 4 5 6 7
flAGS
I
TAGS
CD CC
SLI SKIP PCI
I
OP
ADR STAT
IN
IN IN
set ADR CMND
OUT OUT OUT
Figure 4. Console Display Indicators (Part 1 of 2)
A register selected by switch E is displayed in
the A-register. When either the I- or J register
(see Figure 8) is selected, both the I- and J-registers
are displayed in the Main Storage Address Register
(MSAR). This is also true for the U- and V-registers
(see Figure 8). (The selected register is also dis-
played in the A-register. )
The CPU clock must be stopped and the Allow
Write indicator must be off for any dis play operations
involving storage, or for displays of the IJ or UV
registers. Note, however, that the contents of the
I-, J-, U-, or V-registers can be displayed in the
A-register if the Allow Write indicator is on.
DISPLAYS
Several indicators are provided to display control
information, data bytes, and system status. Each
indicator shows the binary condition of a latch or
signal line. When a latch is set, or a signal is on,
its associated lamp is lighted. In cases where the
position of a bit in a field is important, the numerals
0, 1,
2;
3, etc, are lighted; but where bits are
grouped to form a numeric digit, the binary bit
values are lighted (8,4,2,1). The P lamps associated
with many of the console displays represent the
parity bit for the information.
14
KEY
I
COMMAND
I
I
~ I
8
4 2 1
I!
4
2
i
I I
0 1
2 3
5 6
I CHECKS
SfRV
I
IL PROG PROT CHNL
CHNl INT
IN
DATA CTRL FACE
SERV SUP
OUT OUT
In addition to the control information provided
by the read-only storage display, the 2030 console
displays the contents of certain data registers, the
read/write storage address register, a number of
CPU status conditions, the multiplexor channel tags,
and several check conditions. Although only some
of the registers are displayed, provision is made
to display the contents of all CPU registers as
described in the Display, and Store section of this
publication.
CPU Status Indicators
The CPU status indicators (Figure 4, Part 2 of 2)
signal the actual operating status of the CPU at
any time. These indicators and their corresponding
meanings are:
EX. This lampturns on at the end of each instruction
execution (that is, whenever the micro- instruction
branch-on-interrupt occurs). In the micro-
instruction word immediately following the interrupt
word, the EX latch is reset. Note that if the system
is programmed to stop at the end of instruction exe-
cution (for example, if the stop button has been
pressed), the EX lamp remains on.
It
turns off when
the CPU clock is restarted.