Samsung SDC-30 Service Manual page 8

7. A/D converter (KAD0228) and DRAM Controller (SMA9606)
A/D converter converts the analog signal which is output from Analog processing IC to the 8-bit digital signal
(24.54Mhz). DRAM Controller is synchronized with Vsync, converts the 8-bit data which is output from A/D
converter to 16-bit data, and stores it in DRAM (controlled by the 32-bit microprocessor).
D_OUT(15:0)
TRI
STATE
OUTPUT
(High Z
when
Power Off)
Samsung Electronics
–
RAS
–
CASU
–
CASL
–
WR
–
OE
–
A–OUT(9:1)
EOC
R/B
–
BREQ
–
BACK
–
Data Register
&
MODE
SIO
AE Data Detect.
2 & Knee,
8bit to 16bit Convert
DRAM
Address
Generator
H ADJ
–
V ADJ
ADDR/DATA
BUS
OE
–
CONTROL
Fig. 2-5
SO
SCK
SI
SCS
AD_IN(9:0)
–
ADCK IN(12.27MHz)
WND1 OUT
WND2 OUT
VD/HD
GEN
EXT VD IN
EXT HD IN
CLK IN(24.54MHz)
Reference Information
2-5