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3 7 63 1515 0
5-1. IC PIN DESCRIPTIONS
5-1-1. IC201 µPD784216 (PROGRAM, SYSTEM CONTROL)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TE
L 13942296513
23
24
25
26
27
28
29
30
31
32
33
34
ANO0/P130
35
ANO1/P131
36
37
38
39
40
41
42
43
44
45
www
46
47
48
.
49
50
51
http://www.xiaoyu163.com
Pin Name
I/O
RTP0/P120
O
Analog circuit block mute signal output (H: Mute)
RTP1/P121
O
D/A mute signal output (H: Mute)
RTP2/P122
O
IF circuit block power control signal output (H: ON)
RTP3/P123
O
Main circuit block power control signal output (H: ON)
RTP4/P124
O
DIR block clock select signal output (H: Digital, L: Analog)
RTP5/P125
O
DIR serial select signal output
RTP6/P126
—
Not used. (Open)
RTP7/P127
—
Not used. (Open)
VDD
I
Power supply pin
X2
O
Connect to crystal for main system clock oscillator
X1
I
Connect to crystal for main system clock oscillator
VSS
—
Ground
XT2
—
Not used. (Open)
XT1
—
Not used. (Fix to "L".)
RESET
I
Reset signal input
INTP0/P00
I
DIR audio data detect signal input
INTP1/P01
—
Not used. (Open)
INTP2/P02
O
Sub DSP serial select signal output
INTP3/P03
O
Decoder serial select signal output
INTP4/P04
O
Main DSP serial select signal output
INTP5/P05
O
SLAVE reset signal output
INTP6/P06
I
DIR lock signal input
AVDD
I
Power supply pin
AVREF0
—
Ground
ANI0/P10
I
DSP serial BUSY 5 V signal input
ANI1/P11
—
Not used. (Open)
ANI2/P12
I
Not used. (Open)
ANI3/P13
I
Not used. (Open)
ANI4/P14
I
Not used. (Open)
ANI5/P15
I
Auto mute detect signal (L: OFF, H: ON)
ANI6/P16
—
Not used. (Open)
ANI7/P17
I
Audio input level signal input
AVSS
—
Analog ground
—
Not used. (Open)
—
Not used. (Open)
AVREF1
I
Power supply pin
SI2
I
Main serial data signal input
SO2
O
Main serial data signal output
SCK2
O
Main serial clock signal output
SI1
I
Main serial data signal input
SO2
O
Not used. (Open)
SCK1
O
Main serial clock signal output
PCL/P23
O
Main DSP reset signal output
BUZ/P24
—
Not used.
SI0
I
LED/FLASH serial data signal input
SO0
O
LED/FLASH serial data signal output
x
ao
SCK0
O
LED/FLASH serial clock signal output
y
A0/P80
O
Main DSP mute signal output
i
A1/P81
O
Not used.
A2/P82
O
Not used.
A3/P83
O
Main DSP ALC ON signal output
http://www.xiaoyu163.com
SECTION 5
DIAGRAMS
8
Q Q
3
6 7
1 3
u163
.
(Main DSP ATT setting bit HIGH)
(Main DSP ATT setting bit LOW)
– 9 –
2 9
9 4
2 8
Pin Description
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
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