JVC GY-DV5000U Service Manual page 81

DBCP SCHEMATIC DIAGRAM 5/7
FROM DBE
( 2/7 )
FROM DBE
( 2/7 )
FROM FPGA ( 3/7 )
FROM Serial DAC ( 7/7 )
FROM DBE ( 2/7 )
FROM FPGA
( 3/7 )
FROM OSD
( 7/7 )
FROM CAM CPU ( 6/7 )
FROM Serial DAC
( 7/7 )
FROM DBE
( 2/7 )
FROM FPGA
( 3/7 )
Y
FROM SYS CPU
( 7/7 )
LCD
B-Y
LCD
R-Y
LCD
Y
C
Sub2 board
4-13 4-13
TO CN27
( 7/7 )
TO View finder
FROM
SYS CPU
( 7/7 )
FROM
FPGA ( 3/7 )
C OUT
FROM AUDIO ( 4/7 )
VIDEO OUT
Y OUT
TO
AVO CN6
( Page 4-40 )