Bios Setting - Protech Systems EB-591LF User Manual

Intel queens bay 3.5” embedded board with lvds / audio / 2 lan
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Chapter 4 AMI BIOS Setup

BIOS Setting

Microcode
Revision
L1 Cache RAM
L2 Cache RAM
Processor
Cores
Hyper-
Threading
Intel SpeedStep
Hyper-
threading
Execute
Disable Bit
Limit CPUID
Maximum
Intel
Virtualization
Technology
C-States
Enhanced C1
Enhanced C2
Enhanced C3
Enhanced C4
Page: 4-12
Options
No changeable options
No changeable options
No changeable options
No changeable options
No changeable options
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
-Disabled
-Enabled
Description/Purpose
Displays processor's microcode
update revision.
Displays amount of Level 1 cache.
Displays amount of Level 2 cache.
Displays information about number of
physical cores in processor.
Reports if Intel Hyper-Threading
Technology is supported by
processor.
Enables Intel SpeedStep feature for
dynamic scaling processor frequency.
When disabled, only one thread per
active core will operate.
Enables the NX bit (No eXecute)
security feature.
Enables for legacy operating systems
to boot processors with extended
CPUID functions.
Enables or disables Intel
Virtualization Technology (VT-x).
Takes affect only after power cycling.
Enables or disables C states (C2 and
above) in processor.
Allows processor to enter its C1 idle
state.
Allows processor to enter its C2 idle
state.
Allows processor to enter its C3 idle
state.
Allows processor to enter its C4 idle
state.
EB-591LF USER
'
S MANUAL

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