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Pin No.
Pin Name
dmout
63
A
ckse
64
dact
65
66
TESIN
67
TESIO1
68
VSS
69
PXI
70
PXO
71
VDD
72
XVSS
73
XI
74
XO
B
75
XVDD
76
DVDD
77
RO
78
DVSS
79
DVR
80
LO
81
DVDD
82-84
TEST1-3
85-88
BUS0-3
89
VDD
90
VSS
91
BUCK
C
cce
92
93
TEST4
tsmod
94
rst
95
96
TEST0
hso
97
uhso
98
D
99
EMPH
100
LRCK
*TC9461F
51
E
75
F
98
1
2
I/O
Function and Operation
I
A terminal for setting the mode to output binary PWM for a feed equalizer
from I/O terminals 0 and 1, and binary PWM for disc equalizer from I/O
terminal 2 and 3
I
X'tal select terminal
I
Test terminal
I
Test input terminal
I
Test input/output terminal
Digital GND
I
DSP group clock oscillation circuit input terminal
O
DSP group clock oscillation circuit input terminal
Digital power supply terminal
Ground terminal for system clock oscillation circuit
I
System clock oscillation circuit input terminal
O
System clock oscillation circuit output terminal
Power supply terminal for system clock oscillation circuit
D/A converter power supply terminal
O
R channel data positive rotation output terminal
D/A converter analog ground terminal
D/A converter reference voltage terminal
O
L channel data positive rotation output terminal
D/A converter power supply terminal
I
Test terminal
I/O
Data input/output terminal for microcomputer interface
Digital power supply terminal
Digital GND
I
Clock input terminal for microcomputer interface
I
Chip enable signal input terminal for microcomputer interface
I
Test terminal
I
Local test mode select terminal
I
Reset signal input terminal
I
Test terminal
O
Play speed mode flag output terminal
uhso
O
H
H
L
L
O
Emphasis flag output terminal of subcode Q data
O
Channel clock (44.1 kHz) output terminal
*TC7SH32FUS1
25
1 IN B
2 IN A
1
3 GND
XDV-M8357ZT/UC
2
3
hso
Play speed
H
Once speed play
L
Twice speed play
H
Four times speed play
L
Eight times speed play
3
4
5 VCC
4 OUT Y
4
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