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Functions
Pin
Requirements
Audio DAC
VDDDAC
PLL
VDDPLL
PLLOUT
Audio Stereo
VDDSTEREO
Mode
STEREO1
STEREO2
STEREOM
6.2 Battery
As a standard battery a LiIon battery with a nominal capacity of 3,7 Volt/700mAh is used.
V 1.10
A52/A55/C55 IFX
Sequence
For digital to analog conversion a 16-bit sigma
delta converter is used. Digital input signal is
delivered with an I2S interface. The I2S
interface should be 16-bit format. To be able to
work with all possible operating modes, the
sampling frequency can vary from 8kHz to
48kHz. The performance of the audio output
signal must be guaranteed over the full range
the human ear is able to hear. This means for
FS=8kHz the noise at frequencies higher than
FS/2 must be suppressed. This is done by DSP
and a single ended 2
The clock for the I2S will be varied accordingly
to the sampling frequency. Therefore a clock
recovery based on CLO signal of the I2S can
be implemented. This clock recovery must
smooth any jitter of this clock to reduce the
noise of the DAC.
The PLL will have three frequency modes to
produce a 32xCLO clock for the DSP and the
DAC. The loop filter is realized with an external
RC circuit. This PLL also contains a lock
detector circuit.
For stereo mode 2 single ended buffers are
used. These buffers will be supplied by the
additional regulator with 2.9 Volt to be more
stable against the GSM ripple on the battery
voltage. Also reference voltage for the buffers
is generated by a high precision, low noise
bandgap reference for better performance. An
external capacitor is needed to filter this
reference additionally. The gain steps for the
programmable gain amplifier is identical with
the mono amplifier. No keyclick and ringer
needed for the stereo part. Gain can be
controlled with the TWI. The connected
speaker has an impedance of typical 16 Ohm.
To guarantee an ANTI-POP noise a digital
startup is implemented. This will allow a soft
start of the VMID and creates a "clean" audio
band during the startup. For eliminating
external coupling capacitors for the speaker, an
additional amplifier creates virtual ground (for
both speakers). Accordingly to this, the max
current of the virtual ground has to be the
double of the normal output amplifier. Due to
the power amplifier offset a DC current appear
in the headset. Gain can be adjusted for each
channel separately in steps of 1.5dB in the
range of 21dB to –54 dB and in steps of 3 dB in
the range of –54dB to –75dB
Page 33of 45
Company Confidential © Copyright Siemens AG
nd
order Low Pass filter.
ICM MP CCQ GRM
08/03
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