Sony ZS-Y3 Service Manual page 30

ZS-Y3
• IC Block Diagrams
– CD Board –
IC701 LC78646E-E
80 79 78 77 76 75 74 73 72 71
FIN1
+
–
MIX
FIN2
+
–
LPF
TIN1
+
TBAL
–
TIN2
+
TBAL
–
LEVEL SET
REFI
RAM
DEFECT
SERVO PROCESSOR
A/D
ADAVDD
ADAVSS
JITTC
JITTER
DETECT
SLCO
1
SLCO
SLCIST
SLICE LEVEL
SLCIST 2
EFMIN CONTROL
EFMIN 3
RF
RF 4
RFVDD 5
PDO1
RFVSS 6
PDO2
FIN1
FIN1 7
FR
FIN2 PLL
FIN2 8 PCKIST
VCEC
TIN1
VVDD
TIN1 9
TIN2
VVSS
CLV,CAV
TIN2 10
VREF CONTROL
SBCK/FG
VREF 11
REFI
12
REFI
FE
FE 13
16MOUT
TEC
TEC 14
XVSS
TE
15 CLOCK
TE XIN
RFMON
GENERATOR
RFMON 16 XOUT
JITTC
XVDD
JITTC 17
ADAVDD
WRQ
ADAVDD 18
ADAVSS
CL
ADAVSS 19
TDO
COMMAND
CE
TDO 20
INTERFACE
DI
DO
CONT1-3
GENERAL PURPOSE
SBCK/CONT6
PORTS
CONT4,5
8FS
DIGITAL FILTER
1BIT DAC
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
ZS-Y3
70 69 68 67 66 65 64 63 62 61
EQ AGC PH
BH
SW +
LPF
–
LPF + +
– –
RFMON
MONI
–
CONT
+
VREF
DATA
LDD
TRACK JUMP APC LDS DATACK
LRSY
ASDFIN
AUTO ADJUST
ASDACK
TDO ASLRCK
FDO 16MOUT
S/H
SW D/A SPDO EFLG
SLDO
C2F
GPDAC
XVSS
DRF
FSX/16MIN
DRF
XIN
XOUT
RUPTURE DEFECT
XVDD
RVDD
FRAME SYNC
RCHO
FSEQ
DETECT,PROTECT,INSERT,
RVSS
EFM DECODE
LVSS
V/P
LCHO
LVDD
SUBCODE DECODE CRC
MONI1-5
MONITOR SIGNAL SELECTOR
RAM
EFLG
ERROR
CORRECTION C2F
AUDIO CD
FSX/16MIN
ASDFIN
ASDACK
EXTERNAL
ASLRCK
AUDIO IN
INTERPOLATION DATA
MUTE
SERIAL DATACK
OUT LRSY
ATTENUATION
DEEMPHASIS
AUDIO OUT
LVDD
LVSS
LCHO
LPF
RCHO
RVDD
RVSS
39 40
IC702 BA5826FP-E2
SPIN
REG–B
REGO
MUTE
GND
(TIN)
60 DATA
59 DATACK
58 LRSY
GND
57 ASDFIN
OPOUT
56 ASDACK
55 ASLRCK
54 16MOUT
53 EFLG
52 C2F
51
XVSS
– TU Board –
50 FSX/16MIN
49 XIN
IC1 TA2149BN
48 XOUT
47 XVDD
46 RVDD
45 RCHO
RF GND 1
44 RVSS FM RF
43
LVSS
FM RFIN 2
42 LCHO
AM
AM LOW CUT
3 MIX
41 LVDD
FM
MIX OUT 4
MIX
VCC 5
LEVEL
DET
AM IF
AM IF IN 6
FM IF
FM IF IN 7 1/8
GND 8
AM
DET
AGC
AGC
9
FM
DET
QUAD 10
ST/MO
R-OUT 11
FM/AM
MUTE
12
L-OUT
30 30
1 28 GND
SP–
D.BUFF
27 SL–
2
SP+
D.BUFF
LEVEL
D.BUFF
26 SL+
SHIFT
D.BUFF
3
LEVEL
SHIFT
RST 4
25 SLIN
THERMAL
SHUT-DOWN
MONITOR
24 (SLIN)
5
23 VREF
VCC 22 VCC
6
VCC 21 VCC
7
20
(FIN)
8
DRIVER
MUTE
TIN 9
19 FIN
10
LEVEL
LEVEL
SHIFT
D.BUFF
SHIFT
D.BUFF
18 F–
T– 11
D.BUFF
D.BUFF
17 F+
T+
12
13
NC
16
14
15 OPIN
IC2 LC72137M-TLM-E
CE 1
24 FM RFOUT
DI
CCB
23 RF VCC
CL 3 I/F
22 AM RFIN
DO 4
FM
21 FM OSC
OSC
AM
20 AM OSC
OSC
BUFF BUFF
B01
5
1/1 OR
1/16 19 OSC OUT
B02 6
ST ST LED B03 7
18
IF BUFF
I01 8
SW
I02 9
IF REQ 17 IF REQ
AF BUFF
16 DET OUT
AF
MPX IN
15
14
LPF1
VCO UNIVERSAL
COUNTER
DIVIDE
13 LPF2
DECODE
10
IFIN
20 XOUT
19 XIN
REFERENCE
DIVIDER
18 AOUT
PHASE
17
12BITS AIN
DETECTOR
PROGRAMMABLE
16 PD
CHARGE
DIVIDER
PUMP
15 VSS
UNLOCK
DETECTOR
POWER ON
14 VDD
RESET
B04
13
SWALLOW
COUNTER
1/2 12 FMIN
1/16,1/17
4BITS
11 AMIN