IC
CXD3301R (SONY)
10-BIT SIGNAL PROCESSOR FOR CCD CAMERA
—TOP VIEW—
37
38
39
40
41
42
43
44
45
46
47
48
PIN
PIN
I/O
SIGNAL
I/O
NO.
NO.
1
—
NC
13
—
2
—
NC
14
—
3
O
D0
15
—
4
O
D1
16
I
5
O
D2
17
—
6
O
D3
18
—
7
O
D4
19
I
8
O
D5
20
I
9
O
D6
21
I
10
O
D7
22
I
11
O
D8
23
I
12
O
D9
24
—
16
ADCK
22
XSHD
21
XSHP
23
CLPDM
46
XCS
47
SI
48
SCK
INPUT
CLAMP
30
CCDIN
20
OPTICAL
CLPOB
BLACK
28
C1
CLAMP
29,
31, 32,
37 - 39
REFERENCE
6
C2 - C7
VOLTAGE
GENERATOR
5-8
INPUTS
ADCK
: MASTER CLOCK
CCDIN
: CCD SIGNAL
CLPDM
: DUMMY BIT CLAMP PULSE
24
CLPOB
: OPTICAL BLACK CLAMP PULSE
23
PBLK
: PREBLANKING
22
: CPU CLOCK FOR SERIAL INTERFACE
SCK
21
SI
: CPU DATA FOR SERIAL INTERFACE
20
XCS
: CPU STROBE FOR SERIAL INTERFACE
19
XRST
: RESET (H: NORMAL L: RESET)
18
XSHD
: CCD SIGNAL DATA LEVEL SAMPLING PULSE
17
XSHP
: CCD SIGNAL PRECHARGE LEVEL
16
SAMPLING PULSE
15
14
OUTPUTS
13
C1
: OPTICAL BLACK CLAMP CIRCUIT REFERENCE
C2 - C4
: INTERNAL REFERENCE
C5
: A/D CONVERTER COMMON MODE VOLTAGE
: A/D CONVERTER VOLTAGE REFERENCE
C6, C7
D0 - D9
: A/D CONVERTER
OTHER
NC
: NO CONNECTION
PIN
PIN
SIGNAL
I/O
SIGNAL
I/O
SIGNAL
NO.
NO.
D.V
25
—
A.GND
37
O
C5
CC
GND
26
—
A.GND
38
O
C6
A.GND
27
—
A.V
39
O
C7
CC
ADCK
28
O
C1
40
—
A.V
A.GND
29
O
C2
41
—
A.GND
A.V
30
I
CCDIN
42
—
AGND
CC
PBLK
31
O
C3
43
—
NC
CLPOB
32
O
C4
44
—
NC
XSHP
33
—
A.V
45
I
XRST
CC
XSHD
34
—
A.V
46
I
XCS
CC
CLPDM
35
—
A.GND
47
I
SI
A.V
36
—
A.GND
48
I
SCK
CC
SERIAL
TIMING
INTERFACE
CONTROL
CORRELATED
PROGRAMMABLE
_6 dB
DOUBLE
GAIN
TO
SAMPLING
AMPLIFIER
+42 dB
(CDS)
(PGA)
CC
PREBLANKING
ANALOG
3 - 12
TO
OUTPUT
10
DIGITAL
LATCH
CONVERTER
19
PBLK
D0 - D9
SSC-DC593/DC593P/DC598P (E)