JVC HR-XV48EF Service Manual page 78

SYSTEM CONTROL BLOCK DIAGRAM
5 8 DRUM MOTOR
0
M
1 2
1 2
3 in 1 MDA
5 7
CN3001
CAP MOTOR CAP.M_FG
1 1
CAP.M_F/R
4 4
CAP.M_VCTL
9 9
LM_F/R/S
10 10
M
DRUM_PG/FG
11 11
DRUM_VCTL
12 12
5 5 LOADING MOTOR
M
JS3001
ROTARY
LSA
2
ENCODER
LSB
3
LSC 4
LSD
5
1 2
A/C HEAD
A/C HEAD CN2001
CTL HEAD ( - )
2 5
CTL
CTL HEAD ( +)
1 6
S_DET
D.FF
V. PULSE
TO
VIDEO_ENV
VIDEO/N. AUDIO
N.REC_ST ( H )
SP_SHORT(H)
SB_GAIN(PWM)
C.SYNC
MAIN ( SYSCON, ON SCREEN, SUB CPU )
3
X3002
MAIN SYSTEM
CLOCK
(10MHz)
X3001
C3025
TIMER CLOCK
TIMER CLOCK
( 32kHz )
WF1
TP4001
CTL. P
WF2
WF3
PC3001
PHOTO
SENSOR PC3002
PHOTO
SENSOR
START
Q3002
SENSOR
END
Q3003
SENSOR
IC3001
( SYSTEM CONTROL MICRO PROCESSOR )
69
OSC2(OUT)
87
H.REC_ST ( H )
79
67 PAL_PB(H)
OSC1(IN)
65
X1
49
64 I2C_DATA_AV
X2 50
I2C_CLK_AV
74
A.MUTE ( H )
8
CFG
90
28 N.REC_ST ( H )
CAP.M_F/R
105
101
N.REC(H)
CAPPWM
92
LM_F/R/S(LMC1)
108
DFG
102
AL5V
DRUMPWM
41
REC_SAFETY
6
CTL_AMP_OUT
Q4001
24
CTL_GAIN
SW
54
SP_FG
55
TU_FG
14
START_SENSOR
75
15 I2C_CLK2
END_SENSOR
76
I2C_DATA2
25
LSA
26
LSB
27
LSC
93
LSD(LMC2)
51
OSD_CS
53
3 S.CLK
CTL(-)
52
1
S.DATAFRSYS
CTL(+)
72
SYNC_DET(H)
WF4
11
S_DET
100
V.FF
110
V. PULSE 80
13 SUB_REQ[L]
VIDEO_ENV
48
90 K.BUS_CLK
N.REC_ST ( H ) 47
K.BUS_DATA_FR_SYS
88
SP_SHORT(H)
46
K.BUS_DATA_TO_SYS
38
SB_GAIN(PWM)
98
C.SYNC
WF5
2-41 2-42
S3001 REC SAFETY SW
IC3003
( SERIAL MEMORY )
6
SCL
5
SDA
IC201
( ON_SCREEN )
WF6
27
I2C_DATA
5
LN21
21
CV_IN
24
SYNC_IN
19
CVOUT
9
CS
10
SCLK
11 WF7
SDATA
8
SYNC_DET
IC8201
( SUB CPU )
27
REQ[L]
16
K_CLK
15
K_B.DATA_FR_SYS
14
K_B.DATA_TO_SYS
I2C_DATA_AV
I2C_CLK_AV
TO
A.MUTE ( H )
FMA/DEMOD
H.REC_ST(H)
PAL_PB(H)
I2C_DATA_AV
I2C_CLK_AV
TO
A.MUTE ( H )
VIDEO/N. AUDIO
N.REC_ST(H)
N.REC(H)
I2C_CLK
TO
I2C_DATA TERMINAL
I2C_CLK
TO
I2C_DATA
TUNER
V_TO_OSD TO
V_FROM_OSD VIDEO/N. AUDIO