Toshiba SD-1300A Service Manual page 64

5-3. Main Circuit Diagrams
5-3-1. New Main ICs Information
ZR36732
81
80
41
120
40
121
160 1
TMP94C251AF(Z)
73 72
108 37
36
109
144
1
TMP87CH74AF-2C07
41 40
25
64
24
65
1
80
BA5813FM-E2
15
14
28
1
AD1959YRSRL
15
28
14
1
TA1319P/TA1319AP
5
8
4
1
S-814A50AUC-BDO-T2
4
5
3
1
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Main ICs Function
Ref. No. IC Name Function
IC601 S-24C04BFJ-TB EE-PROM
IC301 ZR36732 AV Decorder
IC401 TC94A03F SERVO & Data Processor
IC502 TA1323F RF Signal processing IC
IC503 BA5813FM-E2 Motor Driver
IC901 AD1959YRSRL DA Converter
IC605 TMP94CS251AF Main Micro Processor
IC202 TC203G08AF-0103 Track Buffer
IC606 MBM29F800BA-55PFTN Flash ROM
Table 3-5-2 BA5813FM-E2
Pin
Name Function
No.
1 FWD Loading driver FWD input terminal
2 REV Loading driver REV input terminal
3 LDCONT Loading driver output voltage control
terminal
4 MUTE1 CH1 mute terminal
5 IN1 Driver CH1 input terminal
6 IN2 Driver CH2 input terminal1
7 PREVcc Pre driver, Loading power supply terminal
8 POWVcc12 CH1, CH2 power step power supply
terminal
9 VOL(-) Loading driver minus output
10 VOL(+) Loading driver plus output
11 VO2(-) Driver CH2 minus output
12 VO2(+) Driver CH2 plus output
13 VO1(-) Driver CH1 minus output
14 VO1(+) Driver CH1 plus output
15 VO4(+) Driver CH4 plus output
16 VO4(-) Driver CH4 minus output
17 VO3(+) Driver CH3 plus output
18 VO3(-) Driver CH3 minus output
19 GND Ground terminal
20 POWVcc34 CH3, CH4 power step power supply
terminal
21 MUTE2 CH2, CH3, CH4 mute terminal
22 IN3 Driver CH3 input terminal
23 IN4 Driver CH4 input terminal
24 RGND Regulator part ground terminal
25 REG-P Regulator output feedback terminal
26 REG-B External regulator Tr base connection
terminal
27 RVcc Regulator part power supply terminal
28 BIAS Bias input terminal
Note:Plus and minus outputs are the polarity against the Input.
(Ex. Pin 14 becomes HIGH, when pin 4 terminal voltage is
HIGH.)
Table 3-5-1
Detail
Setup default, memorization of specification setting.
Decryption, MPEG-2 Decode, Audio Decode, Sub Picture Decode,
OSD.
Performs servo control of DVD or CD, and performs demodulation
and correction of RF signal.
Equalizes playback RF signal and generates error detection signal
required for each servo operation.
Driver for motor driving.
Stereo audio DA converter.
Performs system control for all circuits.
Rate control and Buffer control.
Memorization for firmware.
Table 3-5-3 TMP87CH74AF-2C07 (1/2)
Pin
Name Function
No.
2 P03 8 bit programmable I/O (large current) port
| | (try state)
6 P07 I/O can be assigned by one bit. When
1 P02 (SO1) using as the serial interface input, the input
80 P01 (SI1) mode is selected.
79 P00 (SCK1) When using as the serial interface output,
the output mode is selected with the output
latch "1" set.
22 P17 8 bit programmable I/O (P14 ~ P10 are
(INT4, TC3) large current) port (try state)
21 P16 (INT2) I/O can be assigned by one bit. When
20 P15 using as the external interrupting input and/
(INT3, TC1) or timer counter input, the input mode is
19 P14 selected.
(TC4, PDO, When using as the timer counter output
PWM) and/or divider output, the output mode is
18 P13 (DVO) selected with the output latch to "1" set.
17 P12
(TC2, PPG)
16 P11 (INT1)
15 P10 (INT0)
11 P22 3 bit I/O (large current output) port.
(XTOUT) When using as the input port, external
12 P21 (XTIN) interrupting input/STOP mode release input
14 P20 and/or the oscillator connection, the output
(INT5,STOP) mode is selected with the output latch to
"1" set.
25 P32 (SCK0) 3 bit programmable I/O port (sync open
24 P31 drain).
(SDA, SO0) I/O can be assigned by one bit.
23 P30 When using as the serial bus interface, the
(SCL, SI0) output mode is selected with the output
latch to "1" set.
26 P40 (AIN0) 8 bit programmable I/O port (try state)
| | I/O can be assigned by one bit. When
33 P47 (AIN7) using as the analog input, the input mode
is selected.
34 P50 4 bit programmable I/O port (try state)
| (AIN10) I/O can be assigned by one bit. When
37 | using as the analog input, the input mode
P53 is selected.
(AIN13)
41 P60 (V0) 8 bit high dielectric strength I/O port.
| | When using as the fluorescent display
48 P67 (V7) driver, the output latch is cleared to "0".
49 P70 (V8)
| |
56 P77 (V15)
57 P80 (V16)
| |
64 P87 (V23)
65 P90 (V24)
| |
72 P97 (V31)
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