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AV-28BK5ECB
AV-28BK5ECS
CHASSIS DESCRIPTION
sampling clock= 16MHz = 1024/1 horiz.
1H
(a) Write
Y
Y
0
1
R-Y
R-Y
0
1
B-Y
B-Y
1
0
R-Y
R-Y
B-Y
B-Y
0
1
2
3
8
1024 sampling
Double
Scan
Converting
Y
Y
Y
2
3
4
R-Y
R-Y
R-Y
2
4
3
B-Y
B-Y
B-Y
2
3
4
Time divided multiplex
R-Y
R-Y
B-Y
B-Y7 R-Y
B-Y
4
5
6
8
9
sampling clock = 32MHz = 2048/1 horiz.
2048 sampling
1H
Y
Y
0
1
Write
R-Y
B-Y
0
1
Y
Y
Y
Y
0
2
1
3
R-Y
R-Y
R-Y
R-Y
R-Y
0
2
0
2
B-Y
B-Y
B-Y
B-Y
B-Y
1
1
3
3
(c)
No. 51758
2048 sampling
(b) Read
Y
Y
Y
2
3
4
R-Y
B-Y
R-Y
2
4
3
Read out in double clock
Y
Y
Y
Y
Y
Y
5
7
4
6
8
9
R-Y
R-Y
R-Y
R-Y
R-Y
4
4
6
6
8
8
B-Y
B-Y
B-Y
B-Y
B-Y
5
5
7
9
7
9
Fig.-8
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