XV-S300BK/XV-S332SL/XV-S402SL/XV-S403SG
4.9 K4S641632F-TC75 (IC504) :CMOS SDRAM
4.9.1 Pin layout
4.9.2 Block diagram
CLK
ADD
LCKE
LRAS
CLK
4.9.3 Pin functions
Symbol
CLK
System clock
CS
Chip select
CKE
Clock enable
A0~A11
address
BS0,1
Bank address strobe
RAS
Row address strobe
CAS
column address strobe
WE
Write enable
LDQM
Data input/output mask
DQ0~15
Data input/output
Vcc/Vss
Power supply/ground
Vccq/Vssq
Data output power/ground
N.C
Non connect
32
Bank select
LCBR
LWE
LCAS
Timing register
CKE
CS
RAS
CAS
Description
Data input register
1M x 16
1M x 16
1M x 16
1M x 16
Column decoder
Latency & Burst length
Programming register
LWCBR
WE
L(U)DQM
LWE
LDQM
DQI
LDQM