Casio CZ-1 Service Manual And Spare Parts List page 89

(4)
Key and
switch scanning
Receiving a
key
common
signal
from
data bus,
MAIN CPU
discriminates
a
key
or a
switch
input.
From
signals
PAO
-
PA3
of
MAIN
CPU,
4-line
to
16-line
decoder
74LS154P-2
generates
key
common
signals
KCO -
KC1
1
.
When
a
switch
is
put,
one
of the input signals
KIO
-
KI5
(for
switches)
is
entered
in
CPU
Interface
LSI
MB64H173.
MAIN CPU
generates the clock pulse
'4'
(for switches),
causing the
tristate buffers to
be
opened.
The
input pulse
is
entered
into data bus.
Discriminating the contents of the data
bus.
MAIN CPU
determines
which
switch
is
pushed.
INPUT
OUTPUT
-G1
_G2
D
C -JL.
_A.
1
2
.3™
.
1 &
fi
-J
.
a a 10
U
12 -12.
.12
L L
L
L
L L
H H M
M H H M H
H H
M
H H H H
L L L L
H H
L
M H
H
M
H H H H H M M
H H H
L
L
L
H
L
M
H
L
H H H H
M M H H H H
H
H
H
L L L
H H M H
H
L
H H H H H
H
H
H H H H H
L L
H
L L
H H
H H
L
H H H H
H M H H H H M
L L
H
L
H H H H H
H
L
H H H H M H
H H H H
L
L
H M
L
H
H H H
H
H
L
H M H M H H H
H H
L L
H H H H
H H H
H
H H
L
H H H H H H
H H
L
H
I L I
H H H H
M H M H
L
H M
H H H H H
L
H
t L
H H H H
H H H
H.
H H
L
H H H M H H
L
H
L
M
L
H
M H H H M H
H M H
L
M H H M H
L
H
L
H M H H H H
H H H H H M H
L
H H H M
L
H H
L L
H M
M H H H H
H
H
H H H
L
H H H
L
H
H
L
H M H
H H M H N H H
H
M
H H
L
H H
L
H H H
L
H H H H
H H H H H H H H H N
L
H
L
H
H H
H
H H H H
H
H H H M
H
H
H H H H
L
H
X X X X
H H H
H
H
H H H H H H
H H H H H
M
L
X X X
X
H M H H
M
M
H H H H H M H M N H
H H X
X X X
H H M H
H
H
H H M M H
H
H H H M
74LS1S4P
Function
T«Wt