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4.25 TMP91CW12AF4NB1 (IC501) : CPU
• Pin layout
75
76
100
1
• Block diagram
Pin No
Symbol
1
VREFL
2
AVSS
3
AVCC
4
CDON
5
CDREQ
6
CDMUTE
7
MP3RESET
8
MP3STB
9 to 11
NC
12
SW2
13
REST
14 to 17
NC
18
LCDCE/SO
TE
L 13942296513
19
LCDDA/SI
20
LCDCK
21
BUSS0
22
BUSSI
23
BUSSCK
24
AM0
25
DVCC
26
X2
27
DVSS
28
X1
29
AM1
30
RESET
31,32
NC
33
EMU0
34
EMU1
35
B.DET
36
SW1
37
P.DET
38 to 42
NC
www
43
ALE
44
BUS3
45
BUS2
.
46
BUS1
47
BUS0
1-60 (No.49831)
http://www.xiaoyu163.com
51
50
26
25
I/O
-
Connect to ground
-
Connect to ground
-
Connect to 3.3V
O
CD power supply (3.3V) control
O
CD mechanism power supply request
O
ICD mute
O
CD MP3 reset
O
CD MP3 standby (H: Standby)
-
Not connect
I
CD mechanism SW2
I
CD mechanism rest SW
-
Not connect
O
Chip enable to LCD driver (Not connect)
O
Data to LCD driver (Not connect)
O
Clock to LCD driver (Not connect)
I
JVC BUS data
O
JVC BUS data
I/O
JVC BUS clock
Pull up to 3.3V
-
Connect to 3.3V
Crystal oscillator (24.576MHz)
-
Connect to ground
Crystal oscillator (24.576MHz)
Pull up to 3.3V
I
Reset
-
Not connect
-
Not connect
-
Not connect
I
Back up power supply detection (H: STOP mode)
I
CD mechanism SW1
I
Main power off detection (H: HALT mode)
-
Not connect
-
Not connect
x
ao
u163
y
I/O
CD DSP data3
I/O
CD DSP data2
i
I/O
CD DSP data1
I/O
CD DSP data0
http://www.xiaoyu163.com
2 9
8
Function
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
9 9
9 9
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