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4.6
BR24C01AFV-W-X (IC502) : EEPROM
• Pin layout
Vcc
A0
• Block diagram
A0
A1
A2
TE
L 13942296513
GND
• Pin function
Pin name
Vcc
GND
A0,A1,A2
SCL
SDA
WP
*1 An open drain output requires a pull-up resister.
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.
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WP
SCL
SDA
A1
A2
GND
1
7bit
ADDRESS
2
7bit
DECODER
START
3
CONTROL LOGIC
4
HIGH VOLTAGE GEN.
I/O
-
Power supply
-
Ground (0v)
IN
Slave address set
IN
Serial clock input
IN / OUT
Slave and word address,serial data input, serial data output *1
IN
Write protect input
x
ao
u163
y
i
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2 9
8
1kbit EEPROM ARRAY
SLAVE/WORD
ADDRESS REGISTER
STOP
Q Q
3
6 7
1 3
1 5
ACK
Vcc LEVEL DETECT
Description
co
.
9 4
2 8
8
Vcc
8bit
DATA
7
WP
REGISTER
6
SCL
0 5
8
2 9
9 4
5
SDA
m
9 9
2 8
9 9
(No.49831)1-39
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