Reset Mode; Table 5-2-1 Status Of Internal Registers Immediately After A Reset - Panasonic MN103001G/F01K User Manual

Panax series microcomputer
Table of Contents

Advertisement

5.2 Reset Mode

• The mode in which the reset (RST) pin is active ("L" level) is called "Reset Mode".
• When the reset pin is low, the chip is reset (initialized) internally. When the reset pin makes the transition to
high, the oscillation stabilization wait time is started by an internal 18-bit (when CKSEL pin = "H") or 19-bit
(when CKSEL pin = "L") binary counter based on the oscillation clock.
The oscillation stabilization wait time t
n
t
= 2
/ (f
x 10
OSCW
OSC
n = 18 (when CKSEL pin = "H") or 19 (when CKSEL pin = "L")
In other words, when CKSEL pin = "H" and f
t
= 17.476 [ms]
OSCW
• Table 5-2-1 shows the status of the internal registers immediately after a reset.

Table 5-2-1 Status of Internal Registers Immediately after a Reset

PC
D3 to D0
SP
A3 to A0
MDR
LIR
LAR
PSW
• Internal reset is canceled after completion of oscillation stabilization wait time, and the microcontroller changes
to the normal operation mode.
for oscillation frequency f
OSCW
3
) [ms]
x'40000000
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
x'0000
OSC
= 15[MHz]:
OSC
Operating Mode
[MHz] is:
5-3

Advertisement

Table of Contents
loading

Table of Contents