Schematic Diagrams - Yamaha CD-S700 Service Manual

A B C

SCHEMATIC DIAGRAMS

DIGITAL 1/2
1
2
3
4
CB604
5
6
To Loader ass ' y
CB602
7
8
9
POINT A-1 XL601 (Pin 109 of IC602) POINT A-2 XL603 (Pin 12 of IC604)
10
D E F
1.0
0
1.7
0
1.7
3.3
0
1.7
1.9
1.9
1.9
1.9
1.9
1.9
1.9
1.8
0.2
2.4
2.0
1.8
3.3 1.3
2.4
1.8
1.9
3.3
1.2
1.2
1.3
CD IN
1.7
1.7
0.9
1.5
1.5
0
ACTUATOR DRIVER
1.7
1.7
3.3
3.3
3.3
1.7
0
0 1.7
1.2 1.7
0 0
7.9
3.5
3.7 1.7
3.7 3.6
3.6 3.7
1.5 3.3
5.8
4.0
0 7.9
IC604: MN103SFB5KYAA
USB microprocessor
INTERFACE
ROM
MEMORY 32 bit
256 KByte
8 KB
FLASH MICRO-
DMA 4 CH
MEMORY
PROCESSOR
USB CORE
DATA
SIF RAM
8 KByte
x 2
I2C
x 1
I/O port
INTERRUPT
TIMER
34 pcs (3 V type)
8 pcs (5 V type) CONTROL
8-bit x 4
CLOCK & WDTx1
16-bit x 2 35 Factor
SYSTEM control
G H I
1.8
1.7
1.5
1.6
1.6
1.7
1.7
1.7
2.0
1.9
CD CONTROLLER
1.8
3.3
3.3
1.6
0
3.3
3.3
1.6
1.6
0
1.3
1.7
1.7
1.7
1.7
1.7
3.4
3.4 3.4
1.7
0
A-1
0
0
AUDIO OUT
DIGITAL OUT
IC605: M12L16161A-7TG
512 K x 16-bit x 2 banks synchronous DRAM
V 1 50 V
DD SS
DQ0 2 49 DQ15
DQ1 3 48 DQ14
V SSQ 4 47 V SSQ
LWE
DQ2 5 46
Bank Select Data Input Register DQ13
DQ3 6 45 DQ12
LDQM
V DDQ 7 44 V DDQ
DQ4 8 43 DQ11
512K x 16
DQ5 9 42 DQ10
V 10 41
DQi SSQ V SSQ
CLK 512K x 16
DQ6 11 40 DQ9
DQ7 12 39 DQ8
ADD
V DDQ 13 38 V DDQ
LDQM 14 37 N.C/RFU
Column Decoder
WE 15 36
UDQM
CAS 16 35 CLK
Latency & Burst Length
LCKE RAS 17 34 CKE
CS 18 33 N.C
Programming Register
BA 19 32 A9
LRAS LCBR LWE LDQM
LCAS
LWCBR A10/AP 20 31
A8
A0 21 30 A7
Timing Register
A1 22 29 A6
A2 23 28 A5
CLK CKE CS RAS CAS WE L(U)DQM
A3 24 27 A4
V 25 26 V
DD SS
J K L
IC605
SDRAM
(Writing port)
3.3
2.6
2.0 2.6
2.0 2.6
0 IC606
0
USB
3.4
3.4 0
0
0
MICROPROCESSOR
0.8
3.4 0
3.3
0
A-2
1.9
0 3.4
1.9
3.4
0
0
0.8
3.4
0
IC606: R5523N001A-TR-F
High side switch IC
V IN 4 5 V OUT
GATE CURRENT
EN 1
CONTROL LIMIT
FLAG
DELAY
3 FLG
UVLO
THERMAL
SHUTDOWN
2
GND
M N
CD-S700
J 8 1 1
D 8 0 3
USB IN
CB609
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