Denon adv-m71 Service Manual page 23

QQ
3 7 63 1515 0
Pin No. Pin Name
43 CE
34 NEVO
37 DFT
29 MIRR
36 PI
22 DVDLD
24 CDLD
56 BYP
9 CP
10 CN
45 LCP
44 LCN
30 MP
31 MB
39 MEV
17 CDTE
38 TPH
26 VC
27 VCI
18 VCI2
55 RX
TE
L 13942296513
33 MLPF
19 NC
48 SDEN
47 SDATA
46 SCLK
58 VPA
28 VPB
50 VNA
20 VNB
www
.
http://www.xiaoyu163.com
Type
O Center Error Signal Output. Center error output reference to VCI
O SIGO Bottom Envelope Output. Bottom envelope for mirror detection
Defect Output. Pseudo CMOS output. When a defect is detected, the DFT output goes high. Also
O
the servo AGC output can be monitored at this pin, when CAR bits 7-4 are '0011'
O Mirror Detect Output. Mirror Detect comparator output. Pseudo CMOS output
Pull-in Signal Output. The summing signal output of A, B, C, D or PD1, PD2 for mirror detection.
O
Reference to VCI
O APC output. DVD APC output pin to control the laser power
O APC output. CD APC output pin to control the laser power
I/O The RF AGC integration capacitor CBYP , is connected between BYP and VPA
Differential Phase tracking LPF pin. An external capacitance is connected between this pin and
I/O
the CN pin
Differential Phase tracking LPF pin. An external capacitance is connected between this pin and
I/O
the CP pin
— Center Error LPF pin. An external capacitance is connected between this pin and the LCN pin
— Center Error LPF pin. An external capacitance is connected between this pin and the LCP pin
— MIRR signal Peak hold pin. An external capacitance is connected to between this pin and VPB
— MIRR signal Bottom hold pin. An external capacitance is connected to between this pin and VPB
— Sigo Bottom Envelope pin. An external capacitance is connected to between this pin and VPB
— CD Tracking. E-F Opamp output for feedback
— PI Top Hold pin. An external capacitance is connected to between this pin and VPB
Reference Voltage output. This pin provides the internal DC bias reference voltage (+2.5V lix).
—
Output Impedance is less than 50ohms
— Reference Voltage input. DC bias voltage input for the servo input reference
— Reference Voltage input. DC bias voltage input for the servo input reference
Reference Resistor Input. An external 8.2kohm, 1% resistor is connected from this pin to ground
—
to establish a precise PTAT (proportional to absolute temperature) reference current for the filter
— MIRR signal LPF pin. An external capacitance is connected between this pin and VPB
— No Connect
Serial Data Enable. Serial Enable CMOS input. A high level input enable the serial port (Not to be
I
left open)
Serial Data. Serial data bi-directional CMOS pin. NRZ programming data for the internal registers
I/O
is applied to this input ( Not to be left open)
Serial Clock. Serial Clock CMOS input. The clock applied to this pin is synchronized with the data
I
applied to SDATA (Not to be left open)
Power. Power supply pin for the RF block and serial port
Power. Power supply pin for the servo block
Ground. Ground pin for the RF block and serial port
Ground. Ground pin for the servo bolck
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
Description
Q Q
3 6 7 1 3 1 5
co
.
23
ADV-M71
9 4 2 8
0 5 8 2 9 9 4 2 8
m
23
9 9
9 9