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Flow Chart of Troubleshooting and Circuit Diagrams
10-2-6. BLUETOOTH
Connection between BT ant and PCB pad.
Connection between BT ant and PCB pad.
BT_RST_N
BT_CLK
CLK32K_BT
BT_REQ
TP100
BT_RXD
TP101
BT_TXD
TP102
BT_CTS
TP103
BT_RTS
TP104
BT_PCM_SYNC
TP105
BT_PCM_CLK
TP106
BT_PCM_OUT
TP107
BT_PCM_IN
BT does not work
BT does not work
YES
YES
- signal and ground pad -
- signal and ground pad -
YES
YES
The RF output power
The RF output power
; It should be - 6 ~ 4 dBm
; It should be - 6 ~ 4 dBm
at the end of Balun(F100).
at the end of Balun(F100).
YES
YES
The OSC700 clock signal
The OSC700 clock signal
; It should be 19.2MHz.
; It should be 19.2MHz.
YES
YES
Change BT Chip U100
Change BT Chip U100
VAUX_2.8V
VCC_1.8V
C127
C128
C129
C130
VCC_1.8V
U100
D3
BT_RESETN
BT_CONFIG_1
D6
BT_REF_CLK_IN
BT_CONFIG_2
G3
BT_LP_CLK
BT_CONFIG_3
C4
BT_CLK_REQ_OUT_1
BT_RFP
G7
BT_CLK_REQ_OUT_2
BT_RFN
E6
BT_CLK_REQ_IN_1
G6
BT_CLK_REQ_IN_2
BT_HVA
F7
BT_HOST_WAKEUP|BT_SPI_INT
BT_HVD
C5
BT_WAKEUP
BT_VDD_D
BT_VIO_A
F5
BT_UART_RXD|BT_SPI_DI
BT_VIO_B
F6
BT_UART_TXD|BT_SPI_DO
BT_VDD_CLD
G4
BT_UART_CTS|BT_SPI_CLK
BT_VDD_DSM
F4
BT_UART_RTS|BT_SPI_CSN
BT_VDD_N
BT_VDD_CL
C2
BT_PCM_SYNC
BT_VDD_RF
D1
BT_PCM_CLK
BT_VSSDIG
D2
BT_PCM_A
BT_VSSDIG
E1
BT_PCM_B
BT_VSSANA
BT_VSSANA
B1
BT_GPIO_9
BT_VSSANA
B2
BT_GPIO_11
BT_VSSRF
C1
BT_GPIO_10
BT_VSSRF
B3
BT_GPIO_16
C3
BT_GPIO_8
BT_TEST1
BT_TEST2
D5
BT_GPIO_0
BT_AF_PRG
NC
NC
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NO
NO
NO
NO
Resoldering R783
Resoldering R783
NO
NO
F100
DEA202450BT-7089C3
5
BAL
UNBAL
C131
7 BAL
3
2
8
6
4
RGND
VCC_1.8V
VAUX_2.8V
GND5
RGND
10-40
Resoldering
Resoldering
Change F100
Change F100
L114
1
BT_ANT+
BT_ANT
C132
L113
VCC_1.8V
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