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2.7. IC2361 (VHiTLVD823+-1Q)
2.7.1 Block Diagram
2.7.2 Pin Connections and short description
Pin No.
48, 49
46, 47
43, 44
39, 40
41, 42
36, 37
34, 35
31, 32
27, 28
29, 30
60, 59, 58, 57, 54, 53, 52, 51
68, 67, 66, 65, 64, 63, 62, 61
78, 77, 76, 75, 74, 73, 70, 69
86, 85, 84, 83, 82, 81, 80, 79
96, 95, 94, 93, 92, 91, 90, 89
6, 5, 2, 1, 100, 99, 98, 97
9
Pin Name
I/O
TA1+, TA1-
O
The 1st Link. The 1st pixel output data when Dual Link.
TB1+, TB1-
O
TC1+, TC1-
O
TD1+, TD1-
O
TCLK1+, TCLK1-
O
LVDS Clock Out for 1st Link.
TA2+, TA2-
O
The 2nd Link. These pins are disabled when Single Link.
TB2+, TB2-
O
TC2+, TC2-
O
TD2+, TD2-
O
TCLK2+, TCLK2-
O
LVDS Clock Out for 2st Link.
R[17:10]
I
The 1st Pixel Data Inputs.
G[17:10]
I
B[17:10]
I
R[27:20]
I
The 2st Pixel Data Inputs.
G[27:20]
I
B[27:20]
I
DE
I
Data Enable Input.
LC-32RD2E/S/RU, LC-37RD2E/S/RU
Pin Function
5 – 12
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