Sony hcd-hdx501W Service Manual page 83

QQ
3 7 63 1515 0
Pin No. Pin Name
DRIVE_RST
42
(EN)
DRIVE_OCP
43
(DIAG)
OVERFLOW1,
44, 45
OVERFLOW2
46 WRITE CE
DAMP LATCH1
47 to 49
to
DAMP LATCH3
50
DAMP INIT
DAMP SOFT
51
MUTE
52 HP_SW
53
HP_MUTE
54 DSP_SPIDS
55
DSP_RESET
56
FL_CS
57 DC_DET
58
DIR_RST
59
DIR_HCE
60
DIR_ERR
TE
L 13942296513
61 DIR_XSTATE
62 VCC
63
MIC/A.CAL SW
64 VSS
65 DIAT_XRST
66
DIAT_XSCEN
67 NO USE
68 TUNED
69 ST_CLK
70 ST_DO
71 ST_CE
72 ST_DI
73 DSP_INTR
74 KEY INT
75
XM_RESET
76 SAT_PCONT
77 DIAT_DET
SAT_AUDIO_
78
SEL
79 DSP_SF_CE
80 CLINK_SEL
www
81 LED_LATCH
82, 83
V_SEL0, V_SEL1
84 IO_CE
.
85
IO_RESET
86
IO_DI
http://www.xiaoyu163.com
I/O
O
Reset signal output to the digital power amplifier "L": reset
I
Shut down state input from the digital power amplifier "L": shut down
I Over flow status input from the stream processor
I Flash write CE Not used (Fixed to at "H" (E3.3V))
O
Serial data latch pulse signal output to the stream processor
O
Reset signal output to the stream processor "L": reset
O Soft muting on/off control signal output to the stream processor "L": muting on
I Headphone detection signal input terminal
O
Muting on/off control signal output terminal
O Device selection signal output to the DSP
O Reset signal output to the DSP "L": reset
Chip select signal output to the fluorescent indicator tube driver
O
I DC offset detection signal input terminal
O Reset signal output to the digital audio interface receiver "L": reset
O Chip enable signal output to the digital audio interface receiver
I PLL lock error signal and data error flag input from the digital audio interface receiver
I Source clock selection monitor input from the digital audio interface receiver
- Power supply terminal (+3.3V)
I Audio code detection signal input from the AUDIO IN/A.CAL MIC jack
- Ground terminal
O Reset signal output to the DIR-TC1 slot "L": reset
O Chip enable signal output to the DIR-TC1 slot
Not used
O
I
Tuning detection signal input from the tuner (FM/AM) "L": tuned
O Serial data transfer clock signal output to the tuner (FM/AM)
I
Serial data input from the tuner (FM/AM)
O Serial chip enable signal output to the tuner (FM/AM)
O Serial data output to the tuner (FM/AM)
I Interrupt signal input from the DSP
I Wake up signal input terminal
O Reset signal output to the XM receiver "L": reset
O Power on/off control signal output terminal "H": power on
I Connect detection signal input from the DIR-TC1 slot
O Data selection signal output terminal for amplifier section
O Chip enable signal output to the flash memory
O Data selection signal output terminal for DMPORT section
O
Serial data latch pulse signal output to the LED driver
x ao u163
O Video signal input selection signal output terminal
y
O Serial data latch pulse signal output to the changer control
i
O
Reset signal output to the changer control "L": reset
O
Serial data output to the changer control
http://www.xiaoyu163.com
2 9
8
Description
Q Q
3 6 7 1 3 1 5
co
.
HCD-HDX500/HDX501W
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9
83