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Pin6 is called the Threshold input. When the voltage on this pin rises
above the Threshold Level (usually 2/3 VCC) it cause, the Output to
go Low and place, a ground in the charging network through the
Discharge (Pin7).
Pin4 is the Reset. When this pin goes low it will override the other
inputs and force the Output to go Low and the Discharge to provide a
ground to the charging network.
Pin5 is the Control Voltage. This pin allows the Trigger and
Threshold levels to be independent of VCC. When this pin is
connected the Threshold level will be equal to the Control Voltage
pin (J3 pin1) and the Trigger level will be ½ Control Voltage pin.
Reset Circuit:
The Reset circuit consists of R11, C6, J3 pin3 (Reset Input) S2 and U1 pin4.
R11 is a pull-up resistor that keeps the timer's RESET pin normally High. C6
is a filter capacitor to ensure that noise doesn't accidently reset the timer IC.
S2 is a normally open push button switch that when closed pulls U3 pin4 low,
resetting the timer IC. J3 allows for an external reset of the timer IC.
Control Voltage Circuit:
The control voltage circuit is used to change the trigger levels of the timer as
mentioned in Timer Pin-out and Function. It also can be used for pulse width
and pulse position modulation. C4 is a filter capacitor that ensures noise does
not effect timer operation. R8 allows the Control Voltage to be set to any
value between 0 and +VCC. JMP5 allows R8's wiper voltage to be applied to
the timer IC. J3 pin1 allows for an external Control Voltage. This voltage can
be any voltage up to +VCC AC or DC. JMP5 should not be installed if an
external Control Voltage is being used. With JMP5 removed and no input on
J3 pin1, the 555 timers Trigger and Threshold voltages are at their default 1/3
VCC and 2/3 VCC values respectively.
Timer Output Circuits:
The Inverted Timer Output circuit consists of current limiting resistor R9, pull-
up resistor R10, protection diode D3, and transistor Q2. The Non-inverted
Timer Output consists of JMP7 the Non-Invert jumper, R12 pull-up resistor,
protection diode D4, and transistor Q3.
The output of the timer chip U1 pin3 is connected to Q2 through current
limiting resistor R9. If U1's pin3 output is Low the base of Q2 is Low, which
turns it off. This allows pull-up resistor R10 to pull Q2's collector High. If
JMP7 is removed this High (approximately +V) is applied to J5 pin2 as the
Inverted Timer Output. If JMP7 is installed this high (approximately +0.7VDC)
is applied to the base of Q3. This causes Q3 to turn on pulling, its collector
UT5A 6
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