Table of Contents
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A
B
C
RX-V471/HTR-4064
DIGITAL 4/6
1
to DIGITAL 1/6
to DIGITAL 3/6
2
3
IC51
IC53
4
iPod AUTHENTICATION
No replacement part available.
サービス部品供給なし
IC52
5
to DIGITAL 3/6
6
0
3.1
0
3.4
7
0.4
EEPROM
R504
3.4
RX-V471
0K
3.1
HTR-4064
1K
0
3.4
3.4
0
3.4
3.4
3.4
3.3
0.4
0
0
1.1
3.1
0
3.4
0.4
1.0
3.1
0
8
3.4
5.6
3.4
0.4
IC54
0.8
3.1
3.3
0
0
IC51, 53: TC74VHC273FT (EL,K)
Octal D-type flip-flop with clear
CLR
1
20 V CC
Q1
2
19
Q8
9
D1
3
18
D8
D2
4
17
D7
5
16
Q2
Q7
Inputs
Output
Function
Q3
6
15
Q6
CLR
D
CK
Q
L
X
X
L
Clear
D3
7
14
D6
H
L
L
−
D4
8
13
D5
−
H
H
H
Q4
9
12
Q5
H
X
Q n
No Change
GND
10
11
CK
D1
D2
D3
D4
D5
D6
D7
D8
3
4
7
8
13
14
17
18
1
CLR
10
D R
D R
D R
D R
D R
D R
D R
D R
CK Q
CK Q
CK Q
CK Q
CK Q
CK Q
CK Q
CK Q
11
CK
2
5
6
9
12
15
16
19
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
94
D
E
F
to DIGITAL 2/6
to DIGITAL 2/6
0
3.4
FLASH ROM
3.4
IC60
3.4
3.4
2.8
2.8
2.8
2.8
2.8
0
3.4
3.4
3.3
0
3.4
0
MAIN
3.3
MICROPROCESSOR
3.4
2.9
0
2.8
2.8
2.8
2.8
IC57
1.1
1.0
1.5
1.5
1.5
2.5
3.3
0
0.2
3.4
3.4
No replacement part available.
0.8
0
サービス部品供給なし
0.4
3.4
3.3
2
3.4
1
D
0
C
3.4
3.4
3.4
3.2
CB51
0
3.3
3.4
5.6
3.4
IC55
5.6
0
CB52
CB53
Page 101
J5
to VIDEO (1)_CB304
IC52: MFI341S2164
IC54, 56: RP130Q331D-TR-F
IC digital
Voltage regulator
P4/IRQ
P3/IRQ
Vcc
H8/300H
I/O port
P2/IRQ
Vss
MICROPROCESSOR
P1/IRQ
V
DD
4
RNG
System control
WDT
FMU
Security logic
Voltage monitoring circuit
Internal address bus
ROM (112 kbytes)
Internal data bus
RES
RAM (4 kbytes)
Power-on
EEPROM (16 kbytes + 2 kbytes)
reset circuit
CE
1
Interval timer 1
Interval timer 2
20
19
18
17
16
On-chip
NC
1
15
NC
Modular multiplication
Register
Pin No.
Symbol
oscillator
P4/IRQ
2
14
P3/IRQ
coprocessor
(512 bytes)
Top view
NC
3
13
P1/IRQ
1
RES
4
12
P2/IRQ
2
GND
3
V
Vcc
5
11
Vss
6
7
8
9
10
4
V
G
H
to DIGITAL 5/6
IC58
3.4
3.4
3.4
3.4
3.3
-11.6
-11.6
-11.6
3.4
3.3
-11.6
3.4
3.3
-11.6
0
0
0
3.4
5.0
0
0
0
0
0
3.4
3.4
3.4
POINT C XL51 (Pin 22 of IC57)
3.4
3.3
3.3
3.4
0
0
3.3
3.4
3.4
0
0
0
0
0
3.4
3.4
0
0
0
3.3
0
3.3
3.3
0
3.4
3.4
0
3.4
IC61
0
0
0
3.3
IC61
IC62
3.4
0
3.4
IC61
0
3.4
0
0
IC61
0
Page 103
H5
Page 99
J7
Page 100
K7
to VIDEO (3)_CB375
to MAIN (4)_CB157
to MAIN (1)_CB156
IC55: LE25LB2562M-TLM-E
V
256 k-bit serial SPI EEPROM
3
OUT
X ·
EEPROM
DECODER
ADDRESS
Cell Array
BUFFERS
and
Vref
LATCHES
Current Limit
Y ·DECODER
2
GND
I/O BUFFERS
CONTROL
and
LOGIC
DATA LATCHES
CS#
1
SO
2
Description
SERIAL INTERFACE
WP#
3
CE
Chip Enable ("H" Active)
VSS
4
Ground Pin
CS#
SCK
SI
SO
WP#
HOLD#
Output Pin
OUT
Input Pin
DD
I
J
K
to DIGITAL 6/6
to DIGITAL 6/6
0
0
0
0
5.0
0
0
0
3.3
0
0
0
0
to DIGITAL 6/6
to DIGITAL 5/6
5.1
0
0.5
0
0.5
0
0
DIGITAL IN
2.6
2.6
ANALOG IN
0
2.6
2.6
0
2.6
2.6
2.6
0
2.6
2.6
2.6
0
2.5
2.5
0
12.2
-11.7
-11.6
-11.6
5.2
3.4
3.2
3.2
3.4
0
2.6
5.1
2.6
0
3.3
3.4
0
3.3
3.3
3.3
3.3
3.3
0
3.3
3.4
3.3
0
0
0
3.3
0
3.4
0
0
IC64
0
IC64
0
3.3
3.3
IC64
0
IC64
0
3.3
0
3.4
0
3.3
CB58
0
0
3.4
3.3
3.4
CB59
(for factory)
POINT D 1 / IC57 (174 pin, +3.3M), 2 / IC57 (21 pin, MCPU_N_RST)
IC57
1
IC57
1
(+3.3M)
(+3.3M)
IC57
2
IC57
2
(MCPU_N_RST)
(MCPU_N_RST)
AC POWER ON
AC POWER OFF
AC POWER ON
(Connect the power cable)
(Disconnect the power cable)
(Connect the power cable)
8
VDD
7
HOLD#
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
6
SCK
★ Components having special characteristics are marked
5
SI
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
L
M
N
CB60
Page 103
E6
to VIDEO (2)_CB384
IC64: TC74VHC08FT
Quad 2-input AND gate
CB61
1A
1
14
Vcc
1B
2
13
4B
1Y
3
12
4A
2A
4
11
4Y
2B
5
10
3B
2Y
6
9
3A
Page 103
F6
GND
7
8
3Y
to VIDEO (2)_CB385
IC62: SN74LVC1G17DCKR
IC61: TC74VHC86FT (EL)
Single schmitt-trigger buffer
Quad exclusive OR gate
CB62
1
5
NC
V CC
1A
1
14
Vcc
A
2
FRONT L
1B
2
13
4B
3
4
GND
Y
1Y
3
12
4A
CENTER
A
B
Y
2A
4
11
4Y
INPUT
OUTPUT
L
L
L
2B
5
10
3B
A
Y
L
H
H
SUBWOOFER
2Y
6
9
3A
H
H
H
L
H
SURROUND L
GND
7
8
3Y
L
L
H
H
L
Page 103
G6
IC60: TC7SH32FU
to VIDEO (2)_CB387
2-input OR gate
IN B
1
5
V
CC
IN A
2
A
B
Y
H
H
H
L
H
H
GND
3
4
OUT Y
H
L
H
L
L
L
CB63
IC58: EN29LV320BB-70TIP
to AM/FM TUNER
32 M-bit flash memory boot sector flash memory, CMOS 3.0 volt-only
RY/BY#
DQ0-DQ15(A-1)
15
29-36,38-45
Vcc
Block Protect Switches
Vss
Erase Voltage Generator
Input/Output Buffers
State
Control
WE#
11
Program Voltage
Generator
Command
STB
Register
Chip Enable
Data Latch
CE#
26
Output Enable
Logic
OE#
28
Y-Decoder
Y-Gating
STB
Vcc Detector
Timer
Cell Matrix
X-Decoder
A0-A20
1-10,16-25,48
A15
1
48
A16
A14
2
47
BYTE#
A13
3
46
V
SS
A12
4
45
DQ15/A-1
CB64
A11
5
44
DQ7
A10
6
43
DQ14
A9
7
42
DQ6
A8
8
41
DQ13
Page 97
G9
A19
9
40
DQ5
A20
10
39
DQ12
WE#
11
38
DQ4
to OPERATION (1)_CB402
48-Pin Standard TSOP
RESET#
12
37
V
CC
NC
13
36
DQ11
WP#ACC
14
35
DQ3
RY/BY#
15
34
DQ10
A18
16
33
DQ2
A17
17
32
DQ9
A7
18
31
DQ1
A6
19
30
DQ8
A5
20
29
DQ0
A4
21
28
OE#
A3
22
27
V
SS
A2
23
26
CE#
A1
24
25
A0
IC57: R5F6416MADFE
Single chip 32-bit microprocessor
8
8
8
8
8
8
8
8
CB65
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Peripheral functions
Timer:
A/D converter:
Clock generator:
10 bits × 1 circuit
4 circuits
Timer A16 bits × 5 timers
Standard: 10 inputs
- XIN-XOUT
Timer B16 bits × 6 timers
Maximum: 34 inputs
- XCIN-XCOUT
Three-phase motor
- On-chip oscillator
controller
- PLL frequency synthesizer
D/A converter:
8 bits × 2 channels
Serial interface:
Watchdog timer:
11
channels
X-Y converter:
15 bits
16 bits × 16 bits
Multi-master I
2
C-bus
DMAC
interface:
CRC calculator (CCITT)
1 channel
16
12
5
DMAC II
X
+ X
+ X
+ 1
Intelligent I/O
R32C/100 Series Microprocessor Core
Memory
Time Measurement: 16
ROM
R2R0
Wave generation: 24
R2R0
FLG
R3R1
R3R1
INTB
Serial interface:
R6R4
R6R4
ISP
RAM
- Variable-length
R7R5
R7R5
USP
A0
synchronous serial I/O
A0
PC
A1
- IEBus
A1
SVF
A2
Multiplier
A2
SVP
A3
A3
VCT
FB
FB
SB
Floating-point unit
SB
Port P19
Port P18
Port P17
Port P16
Port P15
Port P14
P14_1
Port P13
8
8
8
8
8
5
8
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
and must be replaced
●
印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
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