Yamaha HTR-6290 Service Manual page 83

(1) (2)
No. Function Name TYPE PULL GPIO
64 EM_D[9] IO – N
65 Core Supply (CVpp)
66 EM_D[8] IO – N
67 EM_WE_DQM[1] O – N
68 IO Supply (DVpp)
69 Ground(Vss)
70 EM_CLK O – N
71 EM_CKE O – N
72 Ground(Vss)
73 IO Supply (DVpp)
74 EM_A[11] O – N
75 EM_A[9] O – N
76 EM_A[8] O – N
77 Core Supply (CVpp)
78 Ground(Vss)
79 EM_A[7] O – N
80 EM_A[6] O – N
81 IO Supply (DVpp)
82 Ground(Vss)
83 EM_A[5] O – N
84 EM_A[4] O – N
85 Core Supply (CVpp)
86 EM_A[3] O – N
87 Ground(Vss)
88 EM_A[2] O – N
89 EM_A[1] O – N
90 Core Supply (CVpp)
91 EM_A[0] O – N
92 IO Supply (DVpp)
93 EM_A[10] O – N
94 EM_BA[1] O – N
95 Ground(Vss)
96 EM_BA[0] O – N
97 EM_CS[0] O – N
98 EM_RAS O – N
99 Ground(Vss)
100 EM_CS[2] O – N
101 Core Supply (CVpp)
102 EM_RW O – N
103 IO Supply (DVpp)
104 EM_OE O – N
105 SPI0_ENA/I2C1_SDA IO – Y
106 Ground(Vss)
107 SPI0_ENA/I2C1_SCL IO – Y
108 SPI0_CLK/I2C0_SCL IO – Y
109 Ground(Vss)
110 SPI0_SIMO IO – Y
111 SPI0_SOMI/I2C0_SDA IO – Y
112 IO Supply (DVpp)
113 AXR0[0] IO – Y
114 Ground(Vss)
115 AXR0[1] IO – Y
116 AXR0[2] IO – Y
117 AXR0[3] IO – Y
118 Ground(Vss)
119 AXR0[4] IO – Y
120 AXR0[5]/SPI1_SCS IO – Y
121 AXR0[6]/SPI1_ENA IO – Y
122 AXR0[7]/SPI1_CLK IO – Y
123 Core Supply (CVpp)
124 Ground(Vss)
(3)
Detail of Function
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-bits]
Write enable or byte enable for EM_D [15:8]
SDRAM clock
SDRAM clock enable
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
SDRAM bank address and asynchronous memory Low-Order
address
SDRAM bank address and asynchronous memory Low-Order
address
SDRAM chip select
SDRAM row address strobe
Asynchronous memory chip Select
Asynchronous memory read/not write
SDRAM output enable
SPI0 enable (ready) or I2c1 serial data
SPI0 enable (ready) or I2c1 serial clock
SPI0 serial clock or I2c0 serial clock
SPI0 data pin slave in master out
SPI0 data pin slave out master in or I2C0 serial data
McASP0 serial data 0
McASP0 serial data 1
McASP0 serial data 2
McASP0 serial data 3
McASP0 serial data 4
McASP0 serial data 5 or SPI1 slave chip select
McASP0 serial data 6 or SPI1 enable (ready)
McASP0 serial data 7 or SPI1 serial clock
(1) (2)
No. Function Name TYPE PULL GPIO
125 IO Supply (DVpp)
126 AXR0[8]/AXR1[5]/SPI1_SOMI IO – Y
127 AXR0[9]/AXR1[4]/SPI1_SIMO IO – Y
128 Core Supply (CVpp)
129 Ground(Vss) IO – Y
130 AXR0[10]/AXR1[3] IO – Y
131 AXR0[11]/AXR1[2]
132 Core Supply (CVpp)
133 Ground(Vss) IO – Y
134 AXR0[12]/AXR1[1] IO – Y
135 AXR0[13]/AXR1[0]
136 IO Supply (DVpp) IO – Y
137 AXR0[14]/AXR2[1] IO – Y
138 AXR0[15]/AXR2[0] IO – Y
139 ACLKR0
140 Ground(Vss) IO – Y
141 AFSR0 IO – Y
142 ACLKX0 IO – Y
143 AHCLKR0/AHCLKR1 IO – Y
144 AFSX0
RX-V1900/HTR-6290/DSP-AX1900
(3)
Detail of Function
McASP0 serial data 8 or McASP1 serial data 5 or SPI1 data pin slave
out master in
McASP0 serial data 9 or McASP1 serial data 4 or SPI1 data pin slave
in master out
McASP0 serial data 10 or McASP1 serial data 3
McASP0 serial data 11 or McASP1 serial data 2
McASP0 serial data 12 or McASP1 serial data 1
McASP0 serial data 13 or McASP1 serial data 0
McASP0 serial data 14 or McASP2 serial data 1
McASP0 serial data 15 or McASP2 serial data 0
McASP0 receive bit clock
McASP0 receive frame Sync (L/R clock)
McASP0 transmit bit clock
McASP0 and McASP1 receive master clock
McASP0 transmit frame Sync (L/R clock)
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