Schematic Diagram - Digital Board (2/5) - Sony STR-DA5200ES Service Manual

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3 7 6 3 1 5 1 5 0
6-14. SCHEMATIC DIAGRAM – DIGITAL Board (2/5) –
T E
L 1 3 9 4 2 2 9 6 5 1 3
CN2003
11P
MCK_SW
MCK R2100 100
LRCK R2102 100
BCK R2103 100
DATA1 R2104 100
DATA2 R2105 100
DATA3 R2106 100
DATA4 R2107 100
(Page 55) SPDIF R2108 47
ERROR R2109 100
ERROR1
XM/H_SEL R2111 100
XM/H_SEL
CN2006
7P
TU-L
TU-GND
TU-R
GND
2CH-L
GND
2CH-R
(Page 69)
w w w
A1
A2
A3
A4
(Page 42)
STR-DA5200ES
• See page 98 for IC Block Diagrams.
(2/5)
BUFFER
IC2017
TC74VHC393FT
R2096
100
LRCK
CKA VCC
RDA CKB
Q1A RDB
Q2A Q1B
Q3A Q2B
Q4A Q3B
GND Q4B
R2081
10k
INPUT SELECTOR
IC2018
74VHC157FT
C2076
0.1
R2082
S VCC
100
RERR
A0 E
R2112 100
ERROR1
B0 A3
ERROR
Y0 B3
RMCK
A1 Y3
MCK1
B1 A2
Y1 B2
GND Y2
FB2017
MCK1
LRCK1
INPUT SELECTOR
BCK1
IC2019
74VHC157FT
DATA1
DATA2 QA
S VCC
DATA3 DOUT
A0 E
DATA4 DATA1
B0 A3
SPDIF SI_B
Y0 B3
A1 Y3
DATA2
B1 A2
SI_C
Y1 B2
GND Y2
TU-L
TU-R
2CH-L
A/D CONVERTER
IC2024
PCM1802DBR
R2078 R2120
47 100
2CH-R RBCK
BCK LRCK
DOUT
DOUT FSYNC
R2121
DGND BYPAS
100
VDD PDWN
XMCK
SCKI AGND
R2122
OSR VCC
47
FMT0 VREF2
FMT1 VREF1
R2342
MODE0 VINR
10k
C2094 MODE1 VINL
0.1
C2093
10
63V
x a o
y
. i
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FSRATE
R2094
100
C2080
0.1
C2089
C2090
0.1
FB2019
C2092
FB2092
10
0
R2077 47 63V
RBCK
BCK1
BCK C2091
0.1
R2075 47
RLRCK
LRCK1 DO2
LRCK DO4
LRCKO
R2090
Q Q
100
D/A MCK 3 7 6
C2083
0.1
SI_B
SI_D
LRCK
C2084
0.1
BCK
C2079
47
25V
DSP_INT
DATA4 ERROR
SI_E
SF_CPU_CE
DATA3 DSP_MOSI
SI_D SF_DSP_MAS
R2125 R2080
100 47
RLRCK
R2123 10k C2168 100 16V
C2095 0.01
AD RESET
R2124 100
D/A MCK
FB2023
R2097
C2098
C2096 C2100 C2097
10
0.1 0.1 0.1
63V
2CH-R
2CH-L
C2099
4.7 50V FB2022
u 1 6 3
.
43 43
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2 4
8 9 9
(Page 59)
10
CN2004
63V
50P
50 PWR_EXT PWR_EXT 49
48 PWR_EXT PWR_EXT 47
46 PWR_INT PWR_INT 45
44 PWR_INT PWR_INT 43
42 GND GND 41
40 GND GND 39
38 SO_B SO_A 37
36 SO_D SO_C 35
34 DSP_LRCK SO_E 33
3 1 5 1 5 0 8 9 2
32 GND GND 31
30 RESERVED DSP_BCK 29
28 GND GND 27
26 SI_B SI_A 25
24 SI_D SI_C 23
22 LRCK SI_E 21
20 GND GND 19
18 BCK MCK 17
16 GND GND 15
14 DSP_INT DSP_RESET∗ 13
12 DIR_RERR DIR_NONAU 11
10 RESERVED RESERVED 9
8 SF_CPU_CE∗ DSP_SPIDS∗ 7
6 DSP_MOSI DSP_MISO 5
4 SF_DSP_MAS DSP_SPICLK 3
2 GND GND 1
FB2093
C2088
C2085
10
0.1
63V
SHIFT REGISTER
IC2022
TC7WH74FU
CK VCC
D PR
0
Q CLK
GND Q
FB2020
m
c o
STR-DA5200ES
2
8 9 9
LRCKO
LRCKO
DO4
DO4
DO2
DO2
DO1
DO1
DO3
DO3
BCKO
BCKO
(Page 44)
D/A MCK
D/A MCK
DO1 XM/H_SEL
XM/H_SEL
DO3
4 9 8 2 9 9
(Page 45)
BCKO
SI_A ERROR
ERROR
SI_C DSP_INT
DSP_INT
SI_E DSP_RESET
DSP_RESET
DSP_SPIDS
R2018
DSP_SPIDS
FB2018 47
MCK DSP_MISO
DSP_MISO
SF_CPU_CE
SF_CPU_CE
DSP_RESET DSP_MOSI
DSP_MOSI
DIR_NONAU SF_DSP_MAS
SF_DSP_MAS
DSP_SPICLK
DSP_SPICLK (Page
DSP_SPIDS FSRATE
FSRATE 46)
DSP_MISO AD RESET
AD RESET
DSP_SPICLK ERROR1
IH_ERROR
R2116
100
0 D2008
RB051L-40
DSP 2.5V
(Page 45)
A+5V
DSP3.3V
DGND
A.GND
(Page 44)