Sony CDP-CX240 Service Manual page 39

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Pin No. Pin Name
41
TE
42
CE
43 RFDC
44 ADIO
45
AVSS0
46
IGEN
47 AVDD0
48 ASYO
49
ASYI
50
BIAS
51 RFAC
52
AVSS3
53 CLTV
54 FILO
55
FILI
56
PCO
57
AVDD3
VSS
58
59
VDD
60
DOUT
61
LRCK
62 PCMD
63 BCK
TE
L 13942296513
64
EMPH
65 XVDD
66 XTAI
67
XTAO
68 XVSS
69 AVDD1
70 AOUT1
71
AIN1
72 LOUT1
73 AVSS1
74
AVSS2
75 LOUT2
76 AIN2
77
AOUT2
78 AVDD2
79
RMUT
LMUT
80
• Abbreviation
EFM : Eight to Fourteen Modulation
PLL : Phase Locked Loop
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I/O
I Tracking error signal input
I Center servo analog input
I RF signal input
O Test pin (Not used)
– Analog ground
I
Stabilized current input for operational amplifiers
– Analog power supply
O EFM full swing output
I Asymmetry comparate voltage input
I Asymmetry circuit constant current input
I EFM signal input
– Analog ground
I
Control voltage input for master VCO1
O Filter output for master PLL
I Filter input for master PLL
O Charge-pump output for master PLL
–
Analog power supply
– Digital ground
– Digital power supply
O Digital-out output pin
O D/A interface LR clock output (ƒ = Fs) (Not used)
O D/A interface serial data output (Not used)
O D/A interface bit clock output (Not used)
O
Playback disc output in emphasis mode (Not used)
– Power supply for master clock
I X'tal oscillator circuit input (16.9344MHz)
O X'tal oscillator circuit output (16.9344MHz)
– Ground for master clock
– Analog power supply
O L-ch analog output
I L-ch operational amplifiers input
O L-ch line output
– Analog ground
– Analog ground
O
R-ch line output
I R-ch operational amplifiers input
O R-ch analog output
– Analog power supply
O R-ch "0" detection flag output
O L-ch "0" detection flag output
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2 9
8
Function
Q Q
3 6 7 1 3 1 5
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9 4 2 8
0 5 8 2 9 9 4 2 8
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9 9
9 9