Block Diagrams; Bd Section - Sony HCD-VR50 Service Manual

HCD-VR50/VR70
Q Q
3 7 6 3 1 5 1 5 0

7-2. BLOCK DIAGRAMS

– BD SECTION –
OPTICAL PICK-UP BLOCK
(KSS-213D/Q-NP)
DETECTOR
IC103
VCC RF AMP
E
VC
A A
5
C C
RF
A C 7
SUMMING
D D
B D 8
AMP
B B
6
F
FOCUS
ERROR
AMP
E
E
TRACKING
11
F
ERROR
F
10
AMP
LD
LD
DRIVE 3
Q101
LD
LASER
DIODE
PD
PD
APC LD
T E 4
L 1 3 9 4 2 2 9 6 5 1 3
AMP
LD
POWER
IC102
FOCUS/TRACKING COIL DRIVE
SPINDLE/SLED MOTOR DRIVE
T+
12
TRACKING
COIL
5
T
11
6
F+
14
FOCUS
COIL
2
F
13
3
SD+
17
M102
SLED M
24
SD
MOTOR
18
23
SP+
15
M101
SPINDLE
M
MOTOR 25
SP
16
27
20
MUTE
w w w
09
DIGITAL SERVO
DIGITAL SIGNAL PRCESSOR
RFD
RF AC
RF EQ
16 50
AMP
RFI 17
FE
INTEG- ASYI
14 49
RATOR
ASYO
48
TE
13
VC
12
BUFFER
VC
VC 38
LD ON
22
RFDC
43
REF
FE
39
TE
21 41
CE
VC 42
SE
INTEG-
40
RATOR
TFDR
TRDR
TFDR
31
TRDR
32
FFDR
FRDR FFDR
33
FRDR
34
SFDR
SFDR
29
SRDR
SRDR
30
MDP
25
VC
XRST
x a o
. i
– 19 –
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IC101
32K
RAM
EFM
REGISTER
DEMODULATOR
SUB CODE
PROCESSOR
ASYMMETRY
DIGITAL
CORRECTION PLL
DIGITAL
CLV
CONTROL SIGNAL
BLOCK
SERVO
BLOCK
Q Q
3 7 6
DETECTOR
MIRR
OP AMP A/D
DFCT
ANALOG SW CONVERTER
PWM
GENERATOR SERVO DSP
TRACKING
TRACKING
PWM
SERVO
GENERATOR
FOCUS
FOCUS
PWM
SERVO
GENERATOR
SLED
SLED
PWM
SERVO
GENERATOR
M701
TURN
MOTOR
u 1 6 3
y
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2 4
8 9 9
MD2
DIGITAL D OUT
ERROR
OUT
CORRECTOR
PCM-D
BCLK
D/A
LRCK
INTERFACE
C2PO
MUTE
XTAI
CLOCK
GENERATOR
XTSL
SENS
3 1 5 1 5 0 8 9
DATA
SERVO
XLAT
AUTO
SEQUENCER CLOK
CPU
FOK
SCOR
INTERFACE
SQSO
SQCK
S STOP
SERVO
INTERFACE
SCLK
XRST
TURN
MOTOR DRIVER
IC701
7 OUT1 IN1 3
M
m
OUT2 IN2
2 6
c o
.
– 20 –
2
8 9 9
IC381
CD DIGITAL
OUT
63
D+5V OPTICAL
64 1 DOUT
ADATA
66
67
BCLK
65
LRCK
14
C2PO
3 MUTE
IC104
(XTAL 33.8MHz)
71 MCK
2
4
A
69 CTRL1
7 SENS
VIDEO
2 4 9 8 2 9 9
SECTION
(Page 27)
4 DATA
5 XLT
CLK
6
15 SCOR
SUBQ
76
77 SQCK
26 A+5V
S101
LIMIT SW
8 SCLK
LPH
82 XRST
LD ON
• SIGNAL PATH
: CD
: VIDEO
TABLE
SENSOR T. SENS
IC702
DISC
SENSOR DISC SENS
IC703
Q701
C
ROTARY
ENC 2
ENCODER
MAIN
ENC 3
S811
SECTION (2/2)
(Page 25)
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