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3 7 63 1515 0
MAIN BOARD IC501 R5F364AMDFA (SYSTEM CONTROLLER)
Pin No.
Pin Name
1
DAMP_SCDT/DIR_DI
DAMP_SHIFT/
2
3
4
SIRCS_IN
5
FL_DOUT
6
CEC_RX_IN
7
8
9
10
11
12
13
14
15
16
17
CEC (TX/RX)
18
19
20
21
BD_IF_START
22
23
24
25
BD_IF_REQ
TE
L 13942296513
26
CEC_TX_OUT
27
PCONT_FL
28
LED_PWM
29
S-AIR_SDA
30
S-AIR_SCL
31
32
33
S-AIR_GPIO2
34
S-AIR_ADC_SEL
35
BD_RESET
36
BD_PCONT1 to
37 to 39
BD_CONT3
40
BD_PCONT4
BD_PCONT5,
41, 42
BD_CONT6
43
P_CONT1
44
45
FAN_CONT
46
47
48
49
BD_SCLK
50
DRIVER_RST (EN)
OVERFLOW1,
51, 52
OVERFLOW2
www
53
DAMP_INT
54
DAMP_SOFT_MUTE
DAMP_LATCH1 to
55 to 57
DAMP_LATCH3
.
58 to 61
62
63
S-AIR_SRC_RST
64
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I/O
O
Serial data output to the stream processor
O
Serial data transfer clock signal output to the stream processor
DIR_CL
FL_CS
O
Chip select signal output to the fl uorescent indicator tube driver
I
SIRCS signal input from the remote control receiver
O
Serial data output to the fl uorescent indicator tube driver
-
Not used
FL_CLK
O
Serial data transfer clock signal output to the fl uorescent indicator tube driver
BYTE
I
External data bus width selection signal input terminal
CNVss
I
Processor mode selection signal input terminal
Xcin
I
Sub system clock input terminal
Xcout
O
Sub system clock output terminal
RESET
I
System reset signal input from the reset signal generator
Xout
O
Main system clock output terminal (6 MHz)
Vss
-
Ground terminal
Xin
I
Main system clock input terminal (6 MHz)
Vcc
-
Power supply terminal (+3.3V)
I/O
CEC serial data input/output with the HDMI ARC OUT connector
NO USE
-
Not used
KEY_INT
I
Key wake-up signal input terminal
AC_CUT
I
AC cut detection signal input terminal
O
Busy request signal output to the BD decoder
ST_DO
I
Serial data input from the tuner (FM)
ST_CLK
O
Serial data transfer clock signal output to the tuner (FM)
ST_DI
O
Serial data output to the tuner (FM)
I
Request signal input from the BD decoder
-
Not used
O
Power on/off control signal output terminal for the front panel section
O
LED drive signal output terminal
I/O
Two-way I2C data bus with the wireless transceiver
O
I2C clock signal output to the wireless transceiver
TXD1
-
Not used
RXD1
-
Not used
I
Interrupt signal input from the wireless transceiver
O
Data selection signal output terminal for S-AIR section
O
Reset signal output to the BD decoder, NAND fl ash, EEPROM and ethernet interface
BD_CS
O
Chip select signal output to the BD decoder
O
Power on/off control signal output terminal for the BD section
O
Power on/off control signal output terminal
O
Power on/off control signal output terminal for the BD section
O
Power on/off control signal output terminal
FAN_ON
O
Power on/off control signal output terminal for the FAN motor
O
FAN motor on/off control signal output terminal
CE
-
Not used
BD_BDI
O
Serial data output to the BD decoder
BD_BDO
I
Serial data input from the BD decoder
I
Serial data transfer clock signal input from the BD decoder
O
Reset signal output to the power amplifi er
O
Overfl ow detection signal input from the stream processor
O
Reset signal output to the stream processor
O
Soft muting on/off control signal output to stream processor
x
ao
y
O
Serial data latch pulse signal output to the stream processor
i
NO USE
-
Not used
Vcc
-
Power supply terminal (+3.3V)
O
Reset signal output to the S-AIR section
Vss
-
Ground terminal
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8
Not used
Not used
Q Q
3
6 7
1 3
u163
.
HBD-E370/E470/E570/E870/T57
2 9
9 4
2 8
Description
1 5
0 5
8
2 9
9 4
Not used
m
co
9 9
2 8
9 9
89
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