LG 42PA4500 Service Manual page 18

+3.3V
MODEL OPTION
MODEL OPTION
PIN NAME PIN NO.
MODEL_OPT_0
AB3
MODEL_OPT_1
MODEL_OPT_1
RF_SWITCH_CTL
MODEL_OPT_2 AB2
MAIN IC H3
CK+_HDMI2
H2
CK-_HDMI2
J1
D0+_HDMI2
J2
D0-_HDMI2
K1
D1+_HDMI2
J3
D1-_HDMI2
K3
D2+_HDMI2
K2
D2-_HDMI2
F4
DDC_SDA_2
F5
DDC_SCL_2
G5
HPD2
AD6
CK+_HDMI3
AE6
CK-_HDMI3
AD7
D0+_HDMI3
AC6
D0-_HDMI3
AD8
D1+_HDMI3
AC7
D1-_HDMI3
AC8
D2+_HDMI3
AE8
D2-_HDMI3
AE5
DDC_SDA_3
AC5
DDC_SCL_3
AD5
HPD3
E3
CK+_HDMI1
E2
CK-_HDMI1
F1
D0+_HDMI1
F2
D0-_HDMI1
G1
D1+_HDMI1
F3
D1-_HDMI1
G3
D2+_HDMI1
G2
D2-_HDMI1
G7
DDC_SDA_1
G6
DDC_SCL_1
G4
HPD1
R6
CEC_REMOTE_S7
R5
R412 22
DSUB_HSYNC
R413 22 R4
DSUB_VSYNC
R424 33 C407 0.047uF N1
DSUB_R+
R425 68 C408 0.047uF N2
R426 33 C409 0.047uF M1
DSUB_G+
R427 68 C410 0.047uF M3
R428 33 C411 0.047uF L2
DSUB_B+
R406 R411
R429 68 C412 0.047uF L3
10K 2.4K
C413 1000pF M2
T3
SC1_ID
T2
SC1_FB
R431 33 C414 0.047uF R3
SC1_R+/COMP1_Pr+
R432 68 C415 0.047uF T1
R433 33 C416 0.047uF R2
SC1_G+/COMP1_Y+
R434 C417 R1
68 0.047uF
R435 33 C418 0.047uF N3
SC1_B+/COMP1_Pb+
R436 68 0.047uF P2
C419
C420 1000pF P3
SC1_SOG_IN
R430 0
NON_EU
R415 33 C421 0.047uF
W1
COMP2_Pr+
R416 68 C422 0.047uF W2
R417 V1
33 C423 0.047uF
COMP2_Y+
R418 68 C424 0.047uF V3
R419 33 C425 0.047uF U2
COMP2_Pb+
R420 68 C426 0.047uF U3
C427 1000pF V2
A_DEMODE
A_DEMODE
R421 33 C428 0.047uF T5
TU_CVBS
EU R422 33 EU C429 0.047uF T4
AV/SC1_CVBS_IN
R423 33 C430 0.047uF T6
COMP2_Y+
T7
DTV/MNT_VOUT
L421
R414 68 C406 0.047uF U4
Close to MSTAR
SOC_RESET
+3.3V_ST
+1.5V_DDR
BLM18PG121SN1D
C497
22uF R408
16V
10
SOC_RESET
D400-*1
D400
KDS181
BAW56 GEANDE
C402
R403
0.1uF
100K
DUP_AT
DUP_DVB
Normal Power 3.3V
STby 3.3V
+3.3V
AVDD_NODIE:7.362mA
BLM18PG121SN1D
AVDD_NODIE
+3.3V_ST
DUP_AT
L400
BLM18PG121SN1D
L401-*1
CB1608UA121T
DUP_AT C401
L400-*1 0.1uF
DUP_DVB
CB1608UA121T
DUP_DVB
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2012 LG Electronics Inc. All rights reserved.
Only for training and service purposes
Close to MSTAR
LOW HIGH
R442 100 C468
H_NIM
FHD HD
F4
R443 100 C469
H_NIM
A_DEMODE A_DEMODE
C458 0.1uF R446
C459 0.1uF R447
A_DEMODE A_DEMODE
IC400
ANALOG SIF
LGE2111B
Close to MSTAR
+3.3V
AC3
L403 BLM18PG121SN1D
A_RXCP IP
AD2
A_RXCN IM H_NIM
L403-*1
A_RX0P
CB1608UA121T
AD1 H_NIM
A_RX0N SIFP C470
AD3 0.1uF
A_RX1P SIFM DUP_DVB
A_RX1N
AC2
A_RX2P IF_AGC
A_RX2N
TUNER_I2C
DDCDA_DA/GPIO24
AE3
TU_SCL
DDCDA_CK/GPIO23 I2C_SCKM1/GPIO75
AE2
HOTPLUGA/GPIO19 I2C_SDAM1/GPIO76 TU_SDA
C461 30pF
AE4
C_RXCP XIN
AD4
X400
C_RXCN XOUT
24MHz
C462 30pF
C_RX0P
B6
C_RX0N SPDIF_IN/GPIO152
M7
C_RX1P SPDIF_OUT/GPIO153 P_SDA
22
R474
C_RX1N SPDIF_OUT
D1
C_RX2P USB0_DM
D2
C_RX2N USB0_DP
DDCDC_DA/GPIO28
AE9
DDCDC_CK/GPIO27 USB1_DM
AD9
HOTPLUGC/GPIO21 USB1_DP
C10
D_RXCP I2S_IN_BCK/GPIO150 SUB_SDA
B10
D_RXCN I2S_IN_SD/GPIO151 SUB_SCL
B9
D_RX0P I2S_IN_WS/GPIO149 P_SCL
22
R473
D_RX0N
A9
D_RX1P I2S_OUT_BCK/GPIO156
B8
D_RX1N I2S_OUT_MCK/GPIO154
C9
D_RX2P I2S_OUT_SD/GPIO157
A8
D_RX2N I2S_OUT_WS/GPIO155
DDCDD_DA/GPIO30
DDCDD_CK/GPIO29
HOTPLUGD/GPIO22
Y3 C447 2.2uF
AUL1
AA2 C448
2.2uF
CEC/GPIO5 AUR1
AA1 C449 2.2uF
AUL3
AA3
C450 2.2uF
HSYNC0 AUR3
W3 C451 2.2uF
VSYNC0 AUL4
Y2
C452 2.2uF
RIN0P AUR4
RIN0M
AB4
GIN0P AUOUTL2
AB5
GIN0M AUOUTR2
BIN0P L404 BLM18SG121TN1D
AA5
BIN0M AUVRM
C454 C456 C463
C466
DUP_DVB
SOGIN0 4.7uF 1uF 0.1uF 10uF
AA4
L404-*1
AUVAG
DUP_AT
Y5 CIS10P121AC
HSYNC1
AUVRP
VSYNC1 C456-*1 DUP_AT
AA9
1uF
RIN1P EARPHONE_OUTL
AB9 DUP_DVB
RIN1M EARPHONE_OUTR
GIN1P
B2
GIN1M RP
C2
BIN1P TP
BIN1M
A2
SOGIN1 RN
B1
TN
RIN2P
A3
R440 R441 R444
RIN2M LED0/GPIO55 COMP1_DET 49.9 49.9 49.9
C3
GIN2P LED1/GPIO56 AV/SC1_DET
GIN2M
C6 C460
BIN2P IRIN/GPIO4 0.1uF
BIN2M
K4
SOGIN2 HWRESET
CVBS0
CVBS1
CVBS2
CVBSOUT2
VCOM
L405-*1
CB1608UA121T
DUP_DVB
+2.5V
L405
DDR3 1.5V
BLM18PG121SN1D
DUP_AT
C446-*1
L402-*1
1uF
AVDD_DDR0:55mA
CB1608UA121T DUP_DVB
L406-*1
AVDD_MIU
CB1608UA121T
DUP_DVB
DECAP FOR SOC
L402 DECAP READY FOR TEST
DUP_DVB
(HIDDEN - UCC)
L406
BLM18PG121SN1D
DUP_AT READY
DUP_AT
C453
0.1uF
4V
BLM18SG121TN1D
C453 IS CAP FOR REPAIR
AVDD_DDR1:55mA
SHOULD BE BOTTOM SIDE Close to IC with width trace
L407-*1
VDD33 DECAP FOR SOC
(HIDDEN - UCC) VDDC 1.05V
+1.10V_VDDC
L401
C467-*1
1uF
DUP_DVB
C4002 SHOULD NEAR MAIN IC
DTV_IF
0.1uF
IF_P_MSTAR
H_NIM
DVB_T_SCA
C483
100pF
0.1uF
IF_N_MSTAR
H_NIM
DVB_T_SCA
C486
100pF
47
TU_SIF
47
NON_A_DEMODE
AGC 1.25V
H_NIM
100 OHM SERIAL
R448
10K
A_DEMODE 0ohm
R449 100
IF_AGC_MAIN
NON_A_DEMODE
C488
R449-*1 0 0.047uF
25V
A_DEMODE H_NIM
Close to MSTAR
EU
SIDE_USB_DM
R454 22
/CI_CD1
SIDE_USB_DP
R455 22
/CI_CD2
EU
to delete CI or gate for
I2S_I/F
AUD_SCK
AUD_MASTER_CLK
AUD_LRCH
for SYSTEM EEPROM
AUD_LRCK
(IC104)
AUDIO IN
RGB_DDC_SDA
RGB_DDC_SCL
AV/SC1_L_IN
AV/SC1_R_IN
COMP2_L_IN
COMP2_R_IN
PC_L_IN
PC_R_IN
AUDIO OUT
SCART1_Lout
SCART1_Rout
RP
TP
<CHIP Config(LED_R/BUZZ)>
Boot from SPI CS1N(EXT_FLASH)
RN
Boot from SPI_CS0N(INT_FLASH)
TN
*H/W opt :
R445
49.9
ETHERNET <CHIP Config>
(I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
C471
B51_no_EJ : 4'b0000 Boot from 8051 with SPI flash
0.1uF
SB51_WOS : 4'b0001 Secure B51 without scramble
SB51_WS : 4'b0010 Secure B51 with scramble
MIPS_SPE_NO_EJ : 4'b0100 Boot from MIPS with SPI flash
MIPS_SPI_EJ_1 : 4'b0101 Boot from MIPS with SPI flash
MIPS_SPI_EJ_2 : 4'b0110 Boot from MIPS with SPI flash
MIPS_WOS : 4'b1001 Secure MIPS without scramble
MIPS_WS : 4'b1010 Scerur MIPS with SCRAMBLE
TX
SOC_RESET
AVDD2P5
C4001 IS CAP FOR REPAIR
SHOULD BE BOTTOM SIDE Normal 2.5V
AVDD2P5:172mA
READY
UCC
C489 C4001
C485
0.1uF
0.1uF
0.1uF
4V 4V +3.3V
NON-UCC
DECAP FOR SOC (HIDDEN - UCC)
AVDD25_PGA
R482 R483 R450 R451
R452 R453
3.3K 3.3K 3.3K 3.3K
2.2K 2.2K
I2C_SDA
C477
I2C_SCL
0.1uF
L407
P_SDA
P_SCL
AVSS_PGA
DUP_DVB UART_RXD
UART_TXD
CIS10P121AC
DUP_AT
+1.10V_VDDC
VDDC : 2026mA
C472-*1 DECAP FOR SOC (HIDDEN - UCC)
1uF
UCC UCC
DUP_DVB
READY
READY READY
C4000,C4005,C4006 IS CAP FOR REPAIR
SHOULD BE BOTTOM SIDE
LGE2111B
PCM_D[0-7]
PCM_D[0]
MAIN IC AB17
PCM_D[1] PCMDATA0/GPIO126
AB19
PCMDATA1/GPIO127
PCM_D[2]
Y16
PCMDATA2/GPIO128
PCM_D[3]
AD15
PCMDATA3/GPIO120
PCM_D[4]
AE15
PCMDATA4/GPIO119
PCM_D[5]
AD14
PCMDATA5/GPIO118
PCM_D[6]
AB15
PCMDATA6/GPIO117
PCM_D[7]
AC16
PCM_A[0-14]
PCMDATA7/GPIO116
PCM_A[0]
Y17
PCM_A[1] PCMADR0/GPIO125
AA16
PCMADR1/GPIO124
PCM_A[2]
AB16
PCM_A[3] PCMADR2/GPIO122
AD16
PCMADR3/GPIO121
PCM_A[4]
Y18
PCMADR4/GPIO99
PCM_A[5]
AE20
PCMADR5/GPIO101
PCM_A[6]
Y19
PCMADR6/GPIO102
PCM_A[7]
AC20
PCMADR7/GPIO103
PCM_A[8]
AB18
PCMADR8/GPIO108
PCM_A[9]
AD17
PCMADR9/GPIO110
PCM_A[10]
AC15
PCMADR10/GPIO114
PCM_A[11]
AE17
PCM_A[12] PCMADR11/GPIO112
AA19
PCMADR12/GPIO104
PCM_A[13]
AA18
PCM_A[14] PCMADR13/GPIO107
AC19
PCMADR14/GPIO106
AE18
/PCM_REG PCMREG_N/GPIO123
AE14
/PCM_OE PCMOE_N/GPIO113
AD19
/PCM_WE PCMWE_N/GPIO197
AD18
/PCM_IORD PCMIORD_N/GPIO111
+5V
AC18
/PCM_IOWR PCMIOWR_N/GPIO109
EU
R456
AC17
10K
/PCM_CE PCMCE_N/GPIO115
AD20
/PCM_IRQA PCMIRQA_N/GPIO105
R457
AE21
10K
PCMCD_N/GPIO130
W16
EU /PCM_WAIT PCMWAIT_N/GPIO100
EU AA17
PCM_RST PCM_RESET/GPIO129 PM_UART_TX/GPIO_PM[1]/GPIO7
C495
0.1uF
AA20
16V
PCM2_CE_N/GPIO131
AB22
PCM2_IRQA_N/GPIO132
USB1_OCD Y21
PCM2_CD_N/GPIO135 PM_UART_RX/GPIO_PM[5]/GPIO11
AB20
USB1_CTL
PCM2_WAIT_N/GPIO133 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12
Y20
PCM2_RESET/GPIO134
E5
UART_RXD UART1_RX/GPIO44
E4
UART_TXD UART1_TX/GPIO43 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16
U24
PM_RXD UART2_RX/GPIO64
U25
PM_TXD UART2_TX/GPIO65
AB21
I2C_SDA
I2C_SDAM2/DDCR_DA/GPIO71 PM_SPI_CZ0/GPIO_PM[12]/GPIO0
AA21
I2C_SCL I2C_SCKM2/DDCR_CK/GPIO72
H5
R466 22
DDCA_DA/UART0_TX
R467 22 H4
DDCA_CK/UART0_RX
AA22
PWM0 PWM0/GPIO66
Y22
PWM1 PWM1/GPIO67
V24
COMP2_DET PWM2/GPIO68
U23
SC_RE2 PWM3/GPIO69
T22
PWM4/GPIO70
C7
LED_RED PWM_PM/GPIO199
E7
KEY1 SAR0/GPIO31
D7
KEY2 SAR1/GPIO32
J6
SAR2/GPIO33
F6
SAR3/GPIO34
C1
AMP_MUTE SAR4/GPIO35
+3.3V
1'b0
1'b1
LED_RED
AUD_SCK
AUD_MASTER_CLK
PWM1
PWM0
IC400
LGE2111B
N5
MAIN IC
5V_DET_HDMI_1 GPIO36 LVA0P
A6
5V_DET_HDMI_2 GPIO37 LVA0M
M6
5V_DET_HDMI_3 GPIO38 LVA1P
R7
GPIO39 LVA1M
P5
GPIO40 LVA2P
D6
AMP_RESET_N GPIO41 LVA2M
M4
TUNER_RESET GPIO42 LVACKP
C8
PCM_5V_CTL GPIO45 LVACKM
C5
CI_DET GPIO46 LVA3P
22 R438 EU E6
AMP_SCL GPIO49 LVA3M
H6
AMP_SDA GPIO50 LVA4P
K5
MODEL_OPT_1 GPIO51 LVA4M
B7
RF_SWITCH_CTL GPIO52
J7
AV2_DET GPIO53 LVB0P
J5
DSUB_DET GPIO54 LVB0M
LVB1P
LVB1M
AB3
SC_RE1 GPIO73 LVB2P
R468 22 AC4
SCART1_MUTE GPIO74 LVB2M
EU
LVBCKP
LVBCKM
LVB3P
LVB3M
LVB4P
LVB4M
IC400
CI_TS_CLK
AA11 CI_TS_VAL
TS0CLK/GPIO87
Y11 CI_TS_SYNC
TS0VALID/GPIO85
AC11 CI_TS_DATA[0-7]
TS0SYNC/GPIO86
from CI SLOT
CI_TS_DATA[0]
AB12
TS0DATA0/GPIO77
CI_TS_DATA[1]
AD11
TS0DATA1/GPIO78
CI_TS_DATA[2]
W9
TS0DATA2/GPIO79
CI_TS_DATA[3]
AE11
TS0DATA3/GPIO80
CI_TS_DATA[4]
AB11
TS0DATA4/GPIO81
CI_TS_DATA[5]
AE12
TS0DATA5/GPIO82 CI_TS_DATA[6]
AC13
TS0DATA6/GPIO83
CI_TS_DATA[7]
AB14
TS0DATA7/GPIO84
AB13
BUF1_FE_TS_CLK
TS1CLK/GPIO98
AC14
TS1VALID/GPI96 BUF1_FE_TS_VAL_ERR
W13
TS1SYNC/GPIO97 BUF1_FE_TS_SYN
BUF1_FE_TS_DATA[0-7]
BUF1_FE_TS_DATA[0]
Y14
TS1DATA0/GPIO88
BUF1_FE_TS_DATA[1]
AA14 Internal demod out
TS1DATA1/GPIO89
BUF1_FE_TS_DATA[2]
AD13
TS1DATA2/GPIO90
BUF1_FE_TS_DATA[3]
Y13
TS1DATA3/GPIO91 BUF1_FE_TS_DATA[4]
AA13
TS1DATA4/GPIO92
BUF1_FE_TS_DATA[5]
AD12
TS1DATA5/GPIO93 BUF1_FE_TS_DATA[6]
AC12
TS1DATA6/GPIO94
BUF1_FE_TS_DATA[7]
W10
TS1DATA7/GPIO95
AR401 22
Y9 OS
NF_WPZ/GPIO198 /PF_WP
AA10
NF_CEZ/GPIO137 /PF_CE0
Y10
NF_CLE/GPIO136 /PF_CE1
AB10
NF_REZ/GPIO139 /PF_OE
AC9
NF_WEZ/GPIO140 /PF_WE
AD10
NF_ALE/GPIO141 PF_ALE
AC10
NF_RBZ/GPIO142 /F_RB
AR400 22
OS
M5 R476 100
GPIO_PM[0]/GPIO6 AC_DET
D4
PM_TXD
L7 100 R477
GPIO_PM[2]/GPIO8 DISP_EN
R481
J4 1K
GPIO_PM[4]/GPIO10 RL_ON
D5
PM_RXD
C4
L5
GPIO_PM[8]/GPIO14 ERROR_DET
L6
GPIO_PM[9]/GPIO15 /FLASH_WP
B3
5V_ON
L4
GPIO_PM[11]/GPIO17
A5 R478 33
PM_SPI_SCK/GPIO1 SPI_SCK
D3 R479 33
/SPI_CS
B5
PM_SPI_SDI/GPIO2 SPI_SDI
B4 R480 33
SPI_SDO
PM_SPI_SDO/GPIO3
IC400
for SERIAL FLASH
LGE2111B
+1.10V_VDDC
MAIN IC U17 R19
AVDDLV GND_80
P17 R23
VDDC_1 GND_81
R17 T23
VDDC_2 GND_82
R18 U5
VDDC_3 GND_83
T17 U6
VDDC_4 GND_84
T18 V11
VDDC_5 GND_86
U18 V15
VDDC_6 GND_87
J9 V16
VDDC_7 GND_88
J11 V17
VDDC_8 GND_89
P8 V18
VDDC_9 GND_90
R8
V19
VDDC_10 GND_91
U11 V20
VDDC_11 GND_92
V10 V21
VDDC_12 GND_93
W11
GND_94
P18 W15
+1.10V_VDDC DVDD_DDR GND_95
W17
GND_96
J14 W18
AVDD_MIU
AVDD_DDR0_C GND_97
J15 W20
AVDD_DDR0_D_1 GND_98
J16 W21
AVDD_DDR0_D_2 GND_99
K16 W22
AVDD_DDR0_D_3 GND_100
Y7
GND_101
J17 AA7
AVDD_DDR1_C GND_102
L16 AB6
AVDD_DDR1_D_1 GND_103
L17 AB7
AVDD_DDR1_D_2 GND_104
M16 A15
AVDD_DDR1_D_3
GND_1
A17
GND_2
AA8 A20
AVDD2P5 AVDD2P5_DADC GND_3
B14
GND_4
AB1 B16
AVDD25_PGA
AVDD25_PGA GND_5
AB2 B18
AVSS_PGA
AVSS_PGA GND_6
B21
GND_7
Y8 C11
AVDD25_LAN GND_8
C12
GND_9
AB8 C13
AVDD_MOD GND_10
C20
GND_11
C496 1uF Y4 C23
DVDD_NODIE GND_12
C25
GND_13
AA6 D23
AVDD_AU33 GND_14
W6 E17
VDD33
AVDD_DVI_USB_MPLL GND_15
E18
GND_16
Y6 E20
AVDD_PLL GND_17
W7 E23
VDDP GND_18
F18
GND_19
W5 G10
AVDD_DMPLL GND_20
W4 G12
AVDD_NODIE
AVDD_NODIE GND_21
G15
GND_22
K8 G16
TEST GND_23
G19
GND_24
J8 G20
GND_EFUSE
GND_25
G24
GND_26
V4 H10
GND_85 GND_27
L20 H12
AC25
GND_54 GND_28
RXA4+
L24 H13
AC24
GND_55 GND_29
RXA4- M8 H14
AD25
GND_56 GND_30
RXA3+
M12 H15
AD24
GND_57 GND_31
RXA3- M13 H16
AE24
GND_58 GND_32
RXACK+
M14 H19
AC23
GND_59 GND_33
RXACK- M15 H25
AE23
GND_60 GND_34
RXA2+
M17 J12
AD23
GND_61 GND_35
RXA2- M18 J13
AC22
GND_62 GND_36
RXA1+ M19 J19
AD22
GND_63 GND_37
RXA1-
M24 J20
AC21
GND_64
GND_38
RXA0+ N7 J24
AD21
GND_65 GND_39
RXA0-
N13 K12
GND_66 GND_40
N14 K13
V23
GND_67 GND_41
RXB4+
N15 K14
W24
GND_68 GND_42
RXB4- N16 K15
W25
GND_69 GND_43
RXB3+
N17 K18
W23
GND_70 GND_44
RXB3- N18 K19
Y25
GND_71 GND_45
RXBCK+
N19 K25
Y24
GND_72 GND_46
RXBCK- N20 L8
Y23
GND_73 GND_47
RXB2+
N25 L12
AA24
GND_74 GND_48
RXB2-
P13 L13
AA23
GND_75 GND_49
RXB1+ P14 L14
AB24
GND_76 GND_50
RXB1-
P19 L15
AB25
GND_77 GND_51
RXB0+ P21 L18
AB23
GND_78 GND_52
RXB0-
P24 L19
GND_79 GND_53
GP4_S7LR 2011-10-20
4 6
MAIN
LGE Internal Use Only