Pin No.
Pin Name
183
SPLRCK
184
SPBCK
185
DVDD3
186
XTALO
187
XTALI
188
PRST
189
DVSS
190
VFO13
191
IDGATE
192
DVDD3
193
UDGATE
194
WOBSI
195
SDATA
196
SDEN
197
SLCK
198
BDO
199
ADCVSS
200
ADIN
201
RFSUBI
202
TEZISLV
203
TEI
204
CSO
205
FEI
206
RFLEVEL
207
RFRP_DC
208
RFRP_AC
209
HRFZC
210
PWMVREF
211
PWM2VREF
212
ADCVDD3
213
RFDTSLVP
214
RFDTSLVN
215
RFIN
216
RFIP
I/O
I
Audio left/right channel clock of SPDIF input (Not used)
I
Audio bit clock of SPDIF input (Not used)
—
Power supply (+3.3V)
O
System clock output (27 MHz)
I
System clock input (27MHz)
I
System reset signal input. "H": reset
—
Ground
O
The 1st, 3rd header VFO pulse output (Not used)
O
Header detect signal output (Not used)
—
Power supply (+3.3V)
O
DVD-RAM recording data gate signal output (Not used)
I
Wobble signal input (Not used)
O
RF serial data output
O
RF serial data latch enable
O
RF serial clock output
I
Flag of defect data input status
—
Ground
I
General A/D input
I
RF subtraction signal input terminal (Not used)
I
Tracking error zero crossing low pass input
I
Tracking error input
I
Central servo input
I
Focus error input
I
Sub beam add input or RFRP low pass input
I
RF ripple detect input
I
RF ripple detect input (through AC coupling)
I
High frequency RF ripple zero crossing
I
A reference voltage input for PWM circuitry
I
A reference voltage input for PWM circuitry
—
Power supply (+3.3V)
O
Positive RF data slicer level output (Not used)
O
Negative RF data slicer level output (Not used)
I
Negative input of RF differential signal
I
Positive input of RF differential signal
Function
5-4 E