Sony DPP-EX50 Service Manual page 13

CXD9182R (SONY)
CPU INTERFACE
—TOP VIEW—
157
160
165
170
175
180
185
190
195
200
205
208
PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
1 O STM OUT 5 53 I CLK 0
2 O STM OUT 6 54 I MST
CPU WE 0
3 O DCM OUT 0 55 I
CPU WE 1
4 O DCM OUT 1 56 I
5 O DCM OUT 2 57 I XSM
CPU BS
6 O DCM OUT 3 58 I
CPU CS
7 — V E 59 I
CC
8 — GND 60 I SMCK
9 I DSP D 0 61 I DSP D 8
10 O DCM OUT 4 62 I CPU A 15
11 O DCM OUT 5 63 I CPU A 14
12 O DCM OUT 6 64 I CPU A 13
CPU WAIT
13 O 65 I CPU A 12
14 I DSP D 1 66 I DSP D 9
15 — V I 67 I CPU A 11
CC
16 O DCM OUT 7 68 I CPU A 10
17 I/O PORT 0 69 I CPU A 9
18 I/O PORT 1 70 I CPU A 8
19 I DSP D 2 71 I DSP D 10
20 I/O PORT 2 72 — V I
CC
21 — GND 73 — GND
22 I/O PORT 3 74 I CPU A 7
23 I/O PORT 4 75 I CPU A 6
24 I DSP D 3 76 I DSP D 11
25 I/O PORT 5 77 I CPU A 5
26 I/O PORT 6 78 I CPU A 4
27 I/O PORT 7 79 I CPU A 3
28 I/O PORT 8 80 I CPU A 2
29 I DSP D 4 81 I DSP D 12
30 I/O PORT 9 82 I CPU A 1
31 I/O PORT 10 83 I CPU A 0
32 — GND 84 — GND
33 I/O PORT 11 85 — V E
CC
34 I DSP D 5 86 I DSP D 13
CPU IRL 0
35 I/O PORT 12 87 O
CPU IRL 1
36 I/O PORT 13 88 O
CPU IRL 2
37 I/O PORT 14 89 O
CPU IRL 3
38 — V E 90 O
CC
39 I DSP D 6 91 I DSP D 14
40 I CA A 0 92 O CS OUT 0
41 I/O PORT 15 93 O CS OUT 1
42 I XTST 94 O CS OUT 2
43 — V I 95 O CS OUT 3
CC
44 I DSP D 7 96 — NC
45 — GND 97 — V E
CC
46 I CLK 1 98 I/O CPU D 0
47 I CPU SEL 99 I/O CPU D 1
RESET
48 I 100 I/O CPU D 2
49 I CS A 1 101 I/O CPU D 3
50 I CS A 2 102 — GND
CPU RD
51 I 103 I/O CPU D 4
52 I IVPD 104 I/O CPU D 5
DPP-EX50 V2
104
100
95
90
85
80
75
70
65
60
55
53
PIN PIN
I/O SIGNAL I/O SIGNAL
NO. NO.
105 I/O CPU D 6 157 O HED D 11
106 I/O CPU D 7 158 O HED D 12
107 — V E 159 O HED D 13
CC
108 I/O CPU D 8 160 O HED D 14
109 I/O CPU D 9 161 O HED D 15
110 I/O CPU D 10 162 O HED D 16
111 I/O CPU D 11 163 O HED D 17
112 — GND 164 O HED D 18
113 — NC 165 — NC
114 I/O CPU D 12 166 — V I
CC
115 I/O CPU D 13 167 — V E
CC
116 I/O CPU D 14 168 O HED D 19
117 I/O CPU D 15 169 — GND
118 — NC 170 — NC
119 — V I 171 — A.GND
CC
120 — V E 172 — A.V
CC CC
121 I/O PORT 16 173 O SVR 0
122 I/O PORT 17 174 I SADIN 0
123 I DSP D 15 175 — NC
124 I/O PORT 18 176 O SVR 1
125 — GND 177 I SADIN 1
126 I/O PORT 19 178 O SVR 2
127 I/O PORT 20 179 I SADIN 2
DSP WE
128 I 180 — NC
129 I/O PORT 21 181 — A.V
CC
130 I/O PORT 22 182 — A.GND
131 I/O PORT 23 183 O SVR 3
TEST IN
132 I 184 I SADIN 3
DSP CS
133 I 185 — NC
134 I/O PRINT PLS 186 I SADIN 4
135 — V E 187 O SVR 4
CC
136 — GND 188 I SADIN 5
137 O HED D 0 189 O SVR 5
138 — NC 190 — NC
139 O HED D 1 191 I HADIN
140 O HED D 2 192 O HVR
141 O HED D 3 193 — A.GND
142 — V E 194 — A.V
CC CC
143 — NC 195 — NC
144 O HED CK 196 — A.GND
HED LATCH
145 O 197 O DAO 0
HED STRB
146 O 198 O DAO 1
147 O HED D 4 199 — A.V
CC
148 — NC 200 — NC
149 — GND 201 — GND
150 — V E 202 O STM OUT 0
CC
151 O HED D 5 203 — V I
CC
152 O HED D 6 204 — V E
CC
153 O HED D 7 205 O STM OUT 1
154 O HED D 8 206 O STM OUT 2
155 O HED D 9 207 O STM OUT 3
156 O HED D 10 208 O STM OUT 4
CPU
CS A 0 - CS A 2,
CPU A 0 - CPU A15,
CPU D 0 - CPU D15,
CPU CS CPU RD
, ,
CPU WE 0 CPU WE 1
, ,
CPU BS CPU WAIT
,
92
CS OUT 0
HEAD CONT
93
CS OUT 1
CPU
94
CS OUT 2
INTERFACE
95
128 WORDS x 36-BIT x10
CS OUT 3
47
CPU SEL
53
512 WORDS x 9-BIT x3
CLK0 CLOCK
46
RESET
CLK1
48
CONT
RESET
DAC
CONT
197
DAO 0 D/A
x 2
198
8-BIT
DAO 1
MECHANICAL CONT
87
CPU IRL 0
88
IRQ
CPU IRL 1
89
128 WORDS x 16-BIT x1
CONT
CPU IRL 2
90
CPU IRL 3
DSP
DSP CS
,
DSP WE
,
DSP D 0 - DSP D 15
144
HED CK
146
HED STRB
145
HED LATCH
DPRAM
134
PRINT PLS
20 HED D 0 - HED D 19
DPRAM
132
TEST IN
191
A/D
HADIN
10-BIT
192
HVR
1 MHz
8 DCM OUT 0 - DCM OUT 7
DPRAM
7 STM OUT 0 - STM OUT 6
24 PORT 0 - PORT 23
A/D
6 SADIN 0 - SADIN 5
x 6
10-BIT
1 MHz
6 SVR 0 - SVR 5
5-5
IC