Table of Contents
Advertisement
BD-V1100, BD-V1110
•
Pin Function (By Function)
No.
Pin Name
I/O
Power/Ground and System Services (35)
10,24,40,55,
69,79,90,102,
VDD
114,126,136,
148,184,187
17,26,32,48,
62,78,96,108,
GND
120,131,134,
142,154,198
158
PVDD
157
PGND
183
DVDD
172
DGND
161
RESET
159
SYSCLK
160
USRCLK
I/O User clock (e.g. AC3 decoder clock)
Digitized Video/Compressed Data Interface (14)
199-206
CD[7]-[0]
207
208
PERR
1
PSYNC
2
ACDSTR
3
VCDSTR
4
CDREQ
CPU Interface (75)
44-41,39-33,
31-27,25,
D[0]-[31]
I/O System data bus
23-18,16-11,
9-7
92,91,89-80,
A[8]-[29]
I/O System address bus
77-70,68,67
49
CS
61
R/W
47
READY
45
OD MPEG interrupt request
MIRQ
46
OD GFX interrupt request
GIRQ
66-63
WBE[0]-[3]
58-56,54
SCAS[0]-[3]
53-50
SRAS[0]-[3]
5
BUSREQ
6
BUSACK
60
DRAMOE
59
DRAMWE
Local Memory Interface (52)
143-147,
AA[11]-[0]
149-153,
155,156
112,115,117,
119,122,124,
127,129,130,
DD[15]-[0]
I/O Local DRAM data bus
128,125,123,
121,118,116,
113
93-95,97-101,
DD[31]-[16]
I/O Local DRAM data bus
103-107,
109-111
133
CAS3
58
S Power supply
S Ground
S PLL power supply
S PLL ground
S Video DAC power supply
S Video DAC ground
I
Hard reset
I
CPU clock
Compressed Data
I
Compressed data bus
− n/a
I
Packet error flag
I
PES start code flag
I
Audio compressed data strobe
I
Video compressed data strobe
O Compressed data request
I
Chip select
I
Read/write indicator
O Ready indicator
I
Write byte enable
O System DRAM column address select
O System DRAM row address select
O System bus request
I
System bus acknowledge
O System DRAM output enable
O System DRAM write enable
Extended Data Out DRAM
O Local DRAM address bus
O Column address strobe for byte 3
Function
Digitized Video
YCI[7]-[0]
I
Digitized multiplexed video input
LLCLK2X
I
Line-locked 2x pixel clock
HSI
I
Horizontal sync input
VSI
I
Vertical sync input
− n/a
− n/a
− n/a
Synchronous DRAM
AA[11]-[0]
O Local DRAM address bus
DD[15]-[0]
I/O Local DRAM data bus
− n/a
UDQM
O Upper byte data mask
Advertisement
Table of Contents
