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27 .01.1998 / Page 8
Doc. No: 4812 714 12124
Power table 60 Hz
Indicated
Cycle
power (W)
Time (s)
90
160
350
500
650
750
850
Circuit description
Transformer and Rectifier
El Crisp:
The voltages necessary to the control system are taken from transformer 5101. It has two secondary windings,
one 2.4V (RMS.) with a centre-tap, to drive the filament of the display, and one 25V (RMS.) winding to supply
the rest of the circuits. There is a thermal overload protection included in the transformer, to avoid insulation
breakdown in the case of short circuits on the secondary side. The primary and secondary circuits are
completely isolated from each other. The rectifier consists of diodes 6110, 6111, 6112 and 6113. The rectified
voltage is smoothed by capacitor 2210.
Fuzzy Crisp, Conv, Fuzzy Crisp Conv:
The voltages necessary to the control system are taken from transformer 5101. It has two secondary windings,
one 2.5V winding to drive the filament of the display, and one 20V (RMS) winding to supply the rest of the
circuits. There is a thermal overload protection included in the transformer, to avoid insulation breakdown in the
case of short circuits on the secondary side. The primary and secondary circuits are completely isolated from
each other.
The voltage is doubled in the circuit consisting of the diodes 6110 and 6112 and the capacitors 2101 and 2110.
Microcomputer
The oven is controlled by a single chip microcomputer. It contains RAM and ROM, timer and a clock generator.
The input- and output ports are used to control the display and relays, to read the keys and the rotary encoder.
and to measure the signals from the weight, humidity and temperature sensors. The clock generator uses an
external ceramic resonator to keep an accurate frequency.
VDD and micro processor reset
The voltage between VDD and VSS is regulated by zener diode 6222 and the base-emitter voltage of the
transistor 7222. At start-up the transistor is not conducting, so the reset-pin of 7000 is held low by the resistor
3223. When the voltage between VDD and VSS has increased to about 4.0 Volts, the base current of 7222 is
high enough to make the transistor conduct, and the reset-pin goes high.
When port P13 is set low the reset level is approximately 3 V. This function is used to avoid reset in some parts
of the program execution.
Current to the VDD is feed from either the F/L relay ( 4901) when this is activated or from transistor 7223 when
the relay is turned off.
MT 263/WH
8538 263 53291
On time from
contr. system (s)
23
3.7
23
5.4
23
9.9
23
13.4
23
17
23
19.2
23
21.1
Whirlpool Europe
Customer Service
Start delay
Effecive
time (s)
on time (s)
1.5
2.2
1.5
3.9
1.4
8.5
1.3
12.1
1.2
15.8
1
18.2
0.5
20.6
S E R V I C E
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