Ic-Blockschaltpläne - Grundig Tharus 26 LW 68-9510 Dolby Service Manual

GRUNDIG Service
IC-Blockschaltpläne / IC Block Circuit Diagrams
ANALOG INTERFACE
CLAMP
R
AIN
G CLAMP
AIN
B CLAMP
AIN
SOGIN
SYNC
HSYNC
PROCESSING AND
CLOCK
FILT
GENERATION
VSYNC
SCL
SERIAL REGISTER AND
SDA
POWER MANAGEMENT
A
0
DIGITAL INTERFACE
R
X0+
8
R
X0–
R
X1+
DVI
8
R RECEIVER
X1–
R 8
X2+
R
X2–
R
XC+
R
XC–
R
TERM
DDCSCL
DDCSDA
HDCP
MCL
MDA
INH
10(11)
L4973
ZERO CURRENT VREF
INHIBIT GOOD
5.1V
3.3V
17(19)
SOFT
SS
START
11(12)
COMP
THERMAL
SHUTDOWN
5.1V
3.3V +
E/A -
VFB -
PWM
12(13) +
SYNC OSCILLATOR
18(20)
(4,5,6,7,14,15,16,17)
1(1)
OSC
THERMAL VOLTAGES
SHUTDOWN MONITOR
2
SS_INH INHIBIT SOFTSTART
3.3V
7
COMP
8 E/A
FB PWM
3.3V
OSCILLATOR
3
OSC
V V
SS DD(3.3 V)
XTAL1
Address
XTAL2
16 Bit
RSTIN
CVBS1A
Data
CVBS1B
16 Bit
CVBS2
Port 2
R
8 Bit
G
B
Port 3
M2
COR
15 Bit
BLANK
Port 4
HSYNC
6 Bit
VSYNC
RD
Port 5
WR
6 Bit
CSROM
Port 6
CSSDRAM
7 Bit
MEMCLK
UDQM
JTAG
LDQM 4 Bit
CLKEN
V V
SS DD(2.5 V)
SVP EX52/51
NTSC/PAL/
CVBS1
SECAM Main
3D Comb Capture
CVBS1
Decoder/ Motion Port with
Adaptive De- Filters
S-Video
interlacing
YPbPr
Frame Buffer
SXGA RGB
PIP/
Controller
(1280x1024/60)
Auto Mode/Auto Capture
Tune/Auto Phase Port with
Frame Rate
Hsync/Vsync
Filters
Converter
24 bit Digital RGB
I2C
CPU & OSD
Interface
8 bit Add/Data
AD9882
REF REFBYP ASS
R
8
OUT
A/D
G
8
OUT
A/D
8 B
OUT
A/D
8
DATACK R
OUT
HSOUT
8
VSOUT
G
OUT
SOGOUT
8
B
OUT
DATACK
MUXES
HSOUT
VSOUT
SOGOUT
R
OUT
G
OUT
DE
B
OUT
DATACK
DE
HSYNC
VSYNC
V5.1 V V
CC CC
16(18) 7(8) 8(9)
CBOOT
INTERNAL CHARGE
5.1V
INTERNAL
SUPPLY
REFERENCE
HICCUP CURRENT
LIMITING
CURRENT
LIMITING
R Q 9(10)
S Q
DRIVER
4,5,6,13,14,15 Pin x = Powerdip
Pin (x) = S020
2(2) 3(3)
GND OUT OUT
VCC
5
L4978
CBOOT
CHARGE
INTERNAL INTERNAL
REFERENCE SUPPLY
5.1V
6
BOOT
R
CBOOT
Q
CHARGE
S
AT LIGHT
DRIVE
LOADS
4
1
GND OUT
BA6161
Main Picture
Display
3:2 Pull Down
Auto Color
Cubic4 Scaler
Datapath
Adjustment Overdrive
ICSC
Blender
PIP
Chroma Key
Display
VM Control
H&V Voltage
Protection
Gamma LUT
VBI/OSD/
TELETEXT
LVDS Tx
Display
PROG.
1
CLAMP
PROG.
3
CLAMP
PROG.
5
CLAMP
PROG.
6
CLAMP
PROG.
8
CLAMP
PROG.
10
CLAMP
S CL 4
I
S DA 2
DECODER
SUB-ADDRESS 7
V 9
CC1
V 20
CC2
TEA6425
BYPASS
(BP)
LINE UNDER-VOLTAGE
AUTO-
RESTART
COUNTER
ENABLE
1.0 V + V T
JITTER
ENABLE/
CLOCK
UNDER-
VOLTAGE
DC MAX
(EN/UV)
1.0 V
BOOT
OSCILLATOR
TNY264
UNDER±VOLTAGE
UVS 14
4 V
OVER±VOLTAGE
OVS 1
VOLT±SEC
1 V
LMT
4 V
VS 8
1 V
+
LCD
FB 4
1 V
5 V
ISS
SS 3
HI
LO
5 V
RT 5
2 ISS
TA+/TA-
TB+/TB-
TC+/TC-
TD+/TD-
CT
TCLK+/
7
TCLK-
3 - 46
2 C
0/6 0/6 0/6 0/6 0/6 0/6
dB dB dB dB dB dB
3 STATE OUTPUTS
11
12 13 14 15 16 17
GND
OUTPUTS
REGULATOR
FAULT BYPASS PIN
UNDER-VOLTAGE
PRESENT
+
-
5.8 V
CURRENT
4.8 V
LIMIT STATE
MACHINE
RESET
THERMAL
SHUTDOWN
S Q
R Q
LEADING
BLANKING
6.3 V
UCC5380
UCC3961
UVLO
SOFT S/D
START LATCH
Q R
Q S
PWM
STOP
LATCH
R Q
START S Q
+
CURRENT
LIMIT
S/S
PWM
1.0V
SYNC MAX D/C
SHUT DOWN
OSCILL
RAMP CLK
Chassis G1
0/6 0/6
dB dB
18 19
DRAIN
5.8 V
(D)
V I
LIMIT
CURRENT LIMIT
COMPARATOR
-
+
EDGE
SOURCE
(S)
VDD REG
12 V +
13
10 / 8 V
12
REF
5.0 V 6
GEN
17 V
PWM DRIVE
11
SD
1.375 V 10
9
5V
ISD
HI
LO
ISD
4V 10
2